
- •Features
- •Applications
- •Description
- •1.0 Electrical Characteristics
- •1.1 Maximum Ratings*
- •FIGURE 1-2: Test Circuits.
- •2.0 Typical Performance Characteristics
- •FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample Rate.
- •FIGURE 2-2: Integral Nonlinearity (INL) vs. Vref.
- •FIGURE 2-3: Integral Nonlinearity (INL) vs. Code (Representative Part).
- •FIGURE 2-4: Integral Nonlinearity (INL) vs. Sample Rate (Vdd = 2.7V).
- •FIGURE 2-6: Integral Nonlinearity (INL) vs. Code (Representative Part, Vdd = 2.7V).
- •FIGURE 2-8: Differential Nonlinearity (DNL) vs. Sample Rate.
- •FIGURE 2-11: Differential Nonlinearity (DNL) vs. Sample Rate (Vdd = 2.7V).
- •FIGURE 2-12: Differential Nonlinearity (DNL) vs. Vref (Vdd = 2.7V).
- •FIGURE 2-14: Differential Nonlinearity (DNL) vs. Temperature.
- •FIGURE 2-15: Gain Error vs. Vref.
- •FIGURE 2-16: Differential Nonlinearity (DNL) vs. Code (Representative Part, Vdd = 2.7V).
- •FIGURE 2-18: Offset Error vs. Vref.
- •FIGURE 2-19: Gain Error vs. Temperature.
- •FIGURE 2-21: Total Harmonic Distortion (THD) vs. Input Frequency.
- •FIGURE 2-22: Offset Error vs. Temperature.
- •FIGURE 2-23: Signal to Noise Ratio and Distortion (SINAD) vs. Input Frequency.
- •FIGURE 2-24: Signal to Noise and Distortion (SINAD) vs. Input Signal Level.
- •FIGURE 2-26: Spurious Free Dynamic Range (SFDR) vs. Input Frequency.
- •FIGURE 2-28: Effective Number of Bits (ENOB) vs. Input Frequency.
- •FIGURE 2-29: Power Supply Rejection (PSR) vs. Ripple Frequency.
- •FIGURE 2-31: Idd vs. Vdd.
- •FIGURE 2-32: Idd vs. Clock Frequency.
- •FIGURE 2-33: Idd vs. Temperature.
- •FIGURE 2-34: Iref vs. Vdd.
- •FIGURE 2-35: Iref vs. Clock Frequency.
- •FIGURE 2-36: Iref vs. Temperature.
- •FIGURE 2-37: Idds vs. Vdd.
- •FIGURE 2-38: Idds vs. Temperature.
- •FIGURE 2-39: Analog Input Leakage Current vs. Temperature.
- •3.0 Pin Descriptions
- •3.3 CS/SHDN(Chip Select/Shutdown)
- •3.4 CLK (Serial Clock)
- •4.0 Device Operation
- •4.1 Analog Inputs
- •4.2 Reference Input
- •FIGURE 4-1: Analog Input Model.
- •5.0 Serial Communications
- •FIGURE 5-1: Communication with MCP3001 (MSB first Format).
- •FIGURE 5-2: Communication with MCP3001 (LSB first Format).
- •6.0 Applications Information
- •FIGURE 6-1: SPI Communication with the MCP3001 using 8-bit segments (Mode 0,0: SCLK idles low).
- •FIGURE 6-2: SPI Communication with the MCP3001 using 8-bit segments (Mode 1,1: SCLK idles high).
- •6.2 Maintaining Minimum Clock Speed
- •6.3 Buffering/Filtering the Analog Inputs
- •6.4 Layout Considerations
- •7.0 Packaging Information
- •7.1 Package Marking Information
- •Appendix A: Revision History
- •Product Identification System
- •Worldwide Sales and Service

MCP3001
2.0TYPICAL PERFORMANCE CHARACTERISTICS
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate, TA = 25°C
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0.3 |
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0.2 |
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Positive INL |
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(LSB) |
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0.1 |
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0.0 |
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INL |
-0.1 |
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-0.2 |
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Negative INL |
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-0.3 |
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-0.4 |
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75 |
100 |
125 150 |
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200 225 |
250 |
Sample Rate (ksps)
FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample Rate.
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0.8 |
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0.6 |
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(LSB) |
0.4 |
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Positive INL |
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0.2 |
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0.0 |
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INL |
-0.2 |
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Negative INL |
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-0.6 |
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-0.8 |
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VREF (V)
FIGURE 2-2: Integral Nonlinearity (INL) vs. VREF.
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0.4 |
VDD = VREF = 5V |
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0.3 |
fSAMPLE = 200 ksps |
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(LSB) |
0.2 |
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0.1 |
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0.0 |
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INL |
-0.1 |
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-0.2 |
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-0.3 |
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-0.4 |
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-0.5 |
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256 |
384 |
512 |
640 |
768 |
896 |
1024 |
Digital Code
FIGURE 2-3: Integral Nonlinearity (INL) vs. Code (Representative Part).
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0.4 |
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0.3 |
VDD = VREF = 2.7V |
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(LSB) |
0.2 |
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Positive INL |
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0.1 |
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0.0 |
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INL |
-0.1 |
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-0.2 |
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Negative INL |
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-0.3 |
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75 |
100 |
Sample Rate (ksps)
FIGURE 2-4: Integral Nonlinearity (INL) vs. Sample Rate (VDD = 2.7V).
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1.0 |
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VDD = VREF= 2.7V |
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0.8 |
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0.6 |
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fSAMPLE = 75 ksps |
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(LSB) |
0.4 |
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Positive INL |
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0.2 |
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0.0 |
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INL |
-0.2 |
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-0.4 |
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Negative INL |
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-0.6 |
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-0.8 |
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-1.0 |
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0.0 |
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
3.0 |
VREF (V)
FIGURE 2-5: |
Integral |
Nonlinearity |
(INL) |
vs. |
VREF |
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(VDD = 2.7V). |
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0.50 |
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0.40 |
VDD = VREF = 2.7V |
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0.30 |
fSAMPLE = 75 ksps |
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(LSB) |
0.20 |
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0.10 |
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0.00 |
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INL |
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-0.20 |
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-0.30 |
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-0.40 |
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-0.50 |
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128 |
256 |
384 |
512 |
640 |
768 |
896 |
1024 |
Digital Code
FIGURE 2-6: Integral Nonlinearity (INL) vs. Code (Representative Part, VDD = 2.7V).
DS21293C-page 6 |
♥ 2007 Microchip Technology Inc. |

MCP3001
Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C
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0.3 |
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0.2 |
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Positive INL |
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(LSB) |
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0.0 |
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INL |
0.1 |
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-0.1 |
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Negative INL |
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-0.2 |
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-0.3 |
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-0.4 |
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-50 |
-25 |
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Temperature (°C) |
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FIGURE 2-7: |
Integral |
Nonlinearity |
(INL) |
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vs. |
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Temperature. |
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0.4 |
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0.3 |
VDD = VREF = 2.7V |
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fSAMPLE = 75 ksps |
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0.2 |
Positive INL |
(LSB) |
0.0 |
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INL |
0.1 |
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-0.1 |
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-0.2 |
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Negative INL |
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-0.3 |
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-0.4 |
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-50 |
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Temperature (°C) |
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FIGURE 2-10: Integral |
Nonlinearity |
(INL) |
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vs. |
Temperature (VDD = 2.7V).
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0.3 |
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0.2 |
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(LSB) |
0.1 |
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Positive DNL |
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0.0 |
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DNL |
-0.1 |
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-0.2 |
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Negative DNL |
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-0.3 |
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-0.4 |
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125 |
150 |
175 |
200 |
225 |
250 |
Sample Rate (ksps)
FIGURE 2-8: Differential Nonlinearity (DNL) vs. Sample Rate.
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1.0 |
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0.8 |
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0.6 |
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(LSB) |
0.4 |
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Positive DNL |
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0.2 |
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DNL |
0.0 |
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-0.2 |
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Negative DNL |
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-0.6 |
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-0.8 |
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5 |
VREF (V)
FIGURE 2-9: Differential Nonlinearity (DNL) vs.
VREF.
0.4
0.3VDD = VREF = 2.7V
0.2
Positive DNL
(LSB) |
0.1 |
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0.0 |
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DNL |
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Negative DNL |
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-0.2 |
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-0.3 |
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-0.4 |
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75 |
100 |
Sample Rate (ksps)
FIGURE 2-11: Differential Nonlinearity (DNL) vs. Sample Rate (VDD = 2.7V).
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1.0 |
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0.8 |
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VDD = VREF = 2.7V |
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0.6 |
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fSAMPLE = 75 ksps |
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(LSB) |
0.4 |
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Positive DNL |
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0.2 |
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0.0 |
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DNL |
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Negative DNL |
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-0.6 |
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-0.8 |
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-1.0 |
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0.0 |
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
3.0 |
VREF(V)
FIGURE 2-12: Differential Nonlinearity (DNL) vs. VREF (VDD = 2.7V).
♥ 2007 Microchip Technology Inc. |
DS21293C-page 7 |

MCP3001
Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C
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0.5 |
VDD = VREF = 5V |
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0.4 |
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fSAMPLE = 200 ksps |
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0.3 |
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(LSB) |
0.2 |
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0.1 |
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0.0 |
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DNL |
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-0.2 |
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-0.3 |
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-0.4 |
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-0.5 |
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0 |
128 |
256 |
384 |
512 |
640 |
768 |
896 |
1024 |
Digital Code
FIGURE 2-13: Differential |
Nonlinearity |
(DNL) vs. |
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Code (Representative Part). |
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0.3 |
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0.2 |
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Positive DNL |
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(LSB) |
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0.0 |
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DNL |
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Negative DNL |
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-0.3 |
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Temperature (°C)
FIGURE 2-14: Differential Nonlinearity (DNL) vs. Temperature.
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VDD = VREF = 2.7V |
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fSAMPLE = 75 ksps |
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DNL |
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384 |
512 |
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768 |
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1024 |
Digital Code
FIGURE 2-16: Differential Nonlinearity (DNL) vs. Code (Representative Part, VDD = 2.7V).
0.3 VDD = VREF = 2.7V
0.2fSAMPLE = 75 ksps
(LSB) |
0.1 |
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Positive DNL |
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DNL |
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FIGURE 2-17: Differential |
Nonlinearity |
(DNL) vs. |
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Temperature (VDD = 2.7V). |
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1.0 |
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0.8 |
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0.6 |
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0.2 |
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Error |
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Gain |
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VDD = 5V |
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VREF(V)
FIGURE 2-15: Gain Error vs. VREF.
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VDD = 5V |
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Error |
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Offset |
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VREF (V)
FIGURE 2-18: Offset Error vs. VREF.
DS21293C-page 8 |
♥ 2007 Microchip Technology Inc. |

MCP3001
Note: Unless otherwise indicated, VDD = VREF = 5V, fSAMPLE = 200 ksps, fCLK = 14*Sample Rate,TA = 25°C
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VDD = VREF = 2.7V |
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fSAMPLE = 75 ksps |
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-0.1 |
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Error |
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Error |
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Gain |
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Offset |
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-0.3 |
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fSAMPLE = 200 ksps |
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-0.4 |
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-50 |
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0 |
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Temperature (°C)
1.0
0.9VDD = VREF = 5V
0.8fSAMPLE = 200 ksps
0.7
0.6
0.5VDD = VREF = 2.7V
0.4 |
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0.3 |
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0.2 |
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0.1 |
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0.0 |
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100 |
Temperature (°C)
FIGURE 2-19: Gain Error vs. Temperature. |
FIGURE 2-22: Offset Error vs. Temperature. |
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70 |
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40 |
VDD = VREF = 2.7V |
VDD = VREF = 5V |
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SNR |
30 |
fSAMPLE = 75 ksps |
fSAMPLE = 200 ksps |
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Input Frequency (kHz)
FIGURE 2-20: Signal to Noise Ratio (SNR) vs. Input |
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Frequency. |
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0 |
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VDD = VREF = 2.7V |
VDD = VREF = 5V |
-40 |
fSAMPLE = 75 ksps |
fSAMPLE = 200 ksps |
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THD |
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-60 |
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-70 |
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-80 |
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-90 |
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-100 |
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10 |
100 |
Input Frequency (kHz)
FIGURE 2-21: Total Harmonic Distortion (THD) vs. Input Frequency.
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40 |
VDD = VREF = 2.7V |
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SINAD |
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30 |
fSAMPLE = 200 ksps |
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20 |
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100 |
Input Frequency (kHz)
FIGURE 2-23: Signal to Noise Ratio and Distortion (SINAD) vs. Input Frequency.
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60 |
VDD = VREF = 5V |
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fSAMPLE = 200 ksps |
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SINAD |
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VDD = VREF = 2.7V |
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fSAMPLE = 75 ksps |
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0 |
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-30 |
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-20 |
-15 |
-10 |
-5 |
0 |
Input Signal Level (dB)
FIGURE 2-24: Signal to Noise and Distortion (SINAD) vs. Input Signal Level.
♥ 2007 Microchip Technology Inc. |
DS21293C-page 9 |