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Новосибирский государственный технический университет

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Lab4_me / Lab2 / datasheets / ICs / PIC16C621A.pdf

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PIC16C62X

12.9Timing Diagrams and Specifications

FIGURE 12-12: EXTERNAL CLOCK TIMING

Q4	Q1			Q2		Q3		Q4		Q1
OSC1
OSC1		1	3				3


							4		4
					2
					2

CLKOUT

TABLE 12-3: EXTERNAL CLOCK TIMING REQUIREMENTS

Parameter	Sym	Characteristic	Min	Typ†	Max	Units	Conditions
No.	Sym	Characteristic	Min	Typ†	Max	Units	Conditions
No.


1A	Fosc	External CLKIN Frequency(1)	DC	—	4	MHz	XT and RC Osc mode, VDD=5.0V
			DC	—	20	MHz	HS Osc mode
			DC	—	200	kHz	LP Osc mode

		Oscillator Frequency(1)	DC	—	4	MHz	RC Osc mode, VDD=5.0V
			0.1	—	4	MHz	XT Osc mode
			1	—	20	MHz	HS Osc mode
			DC	—	200	kHz	LP Osc mode

1	Tosc	External CLKIN Period(1)	250	—	—	ns	XT and RC Osc mode
			50	—	—	ns	HS Osc mode
			5	—	—	µs	LP Osc mode

		Oscillator Period(1)	250	—	—	ns	RC Osc mode
			250	—	10,000	ns	XT Osc mode
			50	—	1,000	ns	HS Osc mode
			5	—	—	µs	LP Osc mode

2	TCY	Instruction Cycle Time(1)	1.0	FOSC/4	DC	µs	TCYS=FOSC/4
3*	TosL,	External Clock in (OSC1) High or	100*	—	—	ns	XT oscillator, TOSC L/H duty cycle
	TosH	Low Time	2*	—	—	µs	LP oscillator, TOSC L/H duty cycle
			20*	—	—	ns	HS oscillator, TOSC L/H duty cycle

4*	TosR,	External Clock in (OSC1) Rise or	25*	—	—	ns	XT oscillator
	TosF	Fall Time	50*	—	—	ns	LP oscillator
			50*	—	—	ns	LP oscillator
			15*	—	—	ns	HS oscillator

2:* These parameters are characterized but not tested.

3:† Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at "min." values with an external clock applied to the OSC1 pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.

DS30235J-page 104

2003 Microchip Technology Inc.

								PIC16C62X


FIGURE 12-13: CLKOUT AND I/O TIMING
	Q4			Q1		Q2				Q3
OSC1
OSC1	10							11


CLKOUT					22


					23
	13				23

			19		18			12
I/O Pin	14				18					16




(input)
I/O Pin		17					15
		17					15

									new value
	old value
(output)	old value
(output)

20, 21

Note: All tests must be done with specified capacitance loads (Figure 12-11) 50 pF on I/O pins and CLKOUT.

2003 Microchip Technology Inc.

DS30235J-page 105

PIC16C62X

TABLE 12-4: CLKOUT AND I/O TIMING REQUIREMENTS

Parameter	Sym	Characteristic	Min	Typ†	Max	Units	Conditions
No.	Sym	Characteristic	Min	Typ†	Max	Units	Conditions
No.


10*	TosH2ckL	OSC1↑ to CLKOUT↓(1)	—	75	200	ns	PIC16C62X(A)
			—	—	400	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

11*	TosH2ck	OSC1↑ to CLKOUT↑(1)	—	75	200	ns	PIC16C62X(A)
	H		—	—	400	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

12*	TckR	CLKOUT rise time(1)	—	35	100	ns	PIC16C62X(A)
			—	—	200	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

13*	TckF	CLKOUT fall time(1)	—	35	100	ns	PIC16C62X(A)
			—	—	200	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

14*	TckL2ioV	CLKOUT ↓ to Port out valid(1)	—	—	20	ns
15*	TioV2ckH	Port in valid before CLKOUT ↑(1)	TOSC +200	—	—	ns	PIC16C62X(A)
			ns	—	—	ns	PIC16LC62X(A)
			TOSC +400				PIC16CR62XA
			ns				PIC16LCR62XA

16*	TckH2ioI	Port in hold after CLKOUT ↑(1)	0	—	—	ns
17*	TosH2ioV	OSC1↑ (Q1 cycle) to Port out valid	—	50	150	ns	PIC16C62X(A)
			—		300	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

18*	TosH2ioI	OSC1↑ (Q2 cycle) to Port input	100	—	—	ns	PIC16C62X(A)
		invalid (I/O in hold time)	200	—	—	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

19*	TioV2osH	Port input valid to OSC1↑ (I/O in	0	—	—	ns
		setup time)

20*	TioR	Port output rise time	—	10	40	ns	PIC16C62X(A)
			—	—	80	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

21*	TioF	Port output fall time	—	10	40	ns	PIC16C62X(A)
			—	—	80	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

22*	Tinp	RB0/INT pin high or low time	25	—	—	ns	PIC16C62X(A)
			40	—	—	ns	PIC16LC62X(A)
							PIC16CR62XA
							PIC16LCR62XA

23	Trbp	RB<7:4> change interrupt high or	TCY	—	—	ns
		low time

* These parameters are characterized but not tested.

† Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.

DS30235J-page 106

2003 Microchip Technology Inc.

PIC16C62X

FIGURE 12-14: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING

VDD
MCLR
Internal		30
Internal
POR
	33
PWRT
Timeout	32
	32
OSC
Timeout
Internal
RESET
Watchdog
Timer
RESET		31
	34	31
	34	34
I/O Pins

FIGURE 12-15: BROWN-OUT RESET TIMING

VDD	BVDD
VDD
	35

TABLE 12-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER REQUIREMENTS

Parameter	Sym			Characteristic	Min	Typ†	Max	Units	Conditions
No.	Sym			Characteristic	Min	Typ†	Max	Units	Conditions
No.


30	TmcL		MCLR Pulse Width (low)		2000	—	—	ns	-40° to +85°C

31	Twdt		Watchdog Timer Time-out Period		7*	18	33*	ms	VDD = 5.0V, -40° to +85°C
			(No Prescaler)

32	Tost		Oscillation Start-up Timer Period		—	1024 TOSC	—	—	TOSC = OSC1 period

33	Tpwrt	Power-up Timer Period			28*	72	132*	ms	VDD = 5.0V, -40° to +85°C

								µs
34	TIOZ		I/O hi-impedance from MCLR low			—	2.0	µs

35	TBOR		Brown-out Reset Pulse Width		100*	—	—	µs	3.7V ≤ VDD ≤ 4.3V

*These parameters are characterized but not tested.

†Data in "Typ" column is at 5.0V, 25°C, unless otherwise stated. These parameters are for design guidance only and are not tested.

2003 Microchip Technology Inc.

DS30235J-page 107

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12.9Timing Diagrams and Specifications

FIGURE 12-12: EXTERNAL CLOCK TIMING

TABLE 12-3: EXTERNAL CLOCK TIMING REQUIREMENTS

FIGURE 12-13: CLKOUT AND I/O TIMING

TABLE 12-4: CLKOUT AND I/O TIMING REQUIREMENTS

FIGURE 12-14: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING

FIGURE 12-15: BROWN-OUT RESET TIMING

TABLE 12-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER REQUIREMENTS