Книги2 / 1993 P._Lloyd,__C._C._McAndrew,__M._J._McLennan,__S._N
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K. Nishi et al.: Technology CAD at OKI |
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Other criteria include a fast turn-around-time (TAT) and a |
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maintainability |
of |
the system. |
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In order to meet these |
criteria, UNISAS is organized |
as |
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shown in Fig.!. |
UNISAS |
can |
be |
divided into three parts: l)Gener- |
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al-purpose |
simulator |
group, |
2)Special simulator group, |
and |
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3) Graphical utilities. |
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General-purpose simulator group consists of OPUS for process simulation, ODESA for device simulation and OCAP for circuit
simulation. |
In order to achieve a |
flexibility |
for |
simulation |
purposes, OPUS and ODESA themselves |
have capabilities |
to simulate |
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in lD to 3D |
spaces. An applicability |
to versatile |
devices is not |
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easy to achieve, but upto now, they are successful in simulating MOSFET, bipolar, pO\oTer devices, SOl devices, CCDs, compound
semiconductors and |
even wiring capacitances. |
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Special simulator group now consists of VELMOT for stress- |
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oriented oxidation simulation, PIPS for Monte |
Carlo |
ion |
implanta- |
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tion |
simulation, |
and MONTES for Monte Carlo |
device |
simulation. |
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They |
are |
linked |
with OPUS and |
ODE SA. |
Right |
now, they are |
more |
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in research-oriented applications including |
modeling, |
but |
also |
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help |
to |
achieve |
more |
accurate |
simulation |
of |
device |
characteris- |
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tic. |
We note that other than these in-house simulators, a li- |
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thography |
simulator |
and |
a device |
simulator |
based |
on a |
hydrodynam- |
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ic model are |
also used |
for R&D. |
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Results files of these simulators have the |
same |
unified |
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format and can |
be |
visualized by an in-house graphic system VDIOS. |
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All |
the |
simulators |
have the |
same |
input |
language |
called |
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UNICOL. UNICOL is an in-house-developed natural language, and
endures a full or a |
simplified |
description of |
process |
conditions |
and applied voltage |
conditions. |
This language |
is easy |
to learn, |
and also device engineers do not have to worry about different
grammar. |
This constitutes one of the easinesses for maintain- |
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ability because we need only one UNICOL compiler. |
This also |
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constitutes one of the user-friendlinesses together with the
practicalnesses |
of |
linkage between |
simulators as |
described in |
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the next section. |
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2.2 Linkage of the |
simulators |
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Care should be taken to link general-purpose simulators. |
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Process and |
device simulations are |
used to study (1) the ef- |
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fects |
of process conditions and (2) the effects |
of device |
parame- |
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ters |
like dimensions |
and oxide thickness. For |
the |
first |
purpose, |
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coupled process/device simulations are the necessity. For the second purpose, device simulations changing device parameters are
sufficient, even |
though dopant profiles by process |
simulations |
are preferred in |
order to correlate the simulation |
results with |
K. Nishi et &1.: Technology CAD at OK! |
259 |
experiments. It is plausible that users just change input parameters like implantation condition or gate oxide, and simulations will run automatically.
Thus, UNISAS users can have two choices for a coupled-
process/device |
simulation. |
The first is to use |
directly |
the |
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results of OPUS. |
Accurate |
device shape and dopant distribution |
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are reflected |
to |
the device |
simulations, and this is |
suitable |
for |
the simulations where complex device shapes are crucial for the
device characteristics. |
The other choice is to construct more |
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simplified standard device structures. |
Since not the details but |
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the essences of the device structure |
are reflected, these stand- |
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ard device structure |
libraries are |
suitable to understand the |
basics of the device characteristics depending on the device
parameters. |
Note that |
in the device |
simulation, dopant |
profiles |
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can |
always be taken from OPUS results. |
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In either case, linkage of 3D process and device simulations |
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are |
quite |
complicated. |
We already |
developed GCOS[5] |
for this |
purpose. The system structure is shown in Fig.2. GCOS has capa-
bilities not orily |
to |
handle |
device |
structure by |
process simula- |
tion but also |
to |
generate |
3D |
device shape |
by interpreting |
pseudo-process. The pseudo-process is used to generate standard device structures. Boundary conditions and mesh generations are done interactively using multi-windows, graphics and a mouse. Resulting standard device structures are symbolized using UNICOL
language, which makes |
the modification |
of |
the |
device structure |
easier. |
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Another pre-eminence of GCOS is that GCOS |
has |
the |
capability |
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FUNC. OF GCOS |
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-SET BOUNDARY |
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CONDITIONS |
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-GENERATE MESHES |
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(b) |
-SYMBOLIZE |
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STRUCTURES |
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- MERGE SIMULATION
RESULTS
GCOS
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DEVICE STRUCTURE GENERATOR
ODESA
1D - 3D |
1D - 3D |
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PROCESS |
DEVICE |
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SIMULATOR |
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SIMULATOR |
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Fig.2:System structure of GCOS
260 K. Nishi et &1.: Technology CAD at OK!
to merge two or more process simulation results. For symmetrical devices like conventional MOSFET, process simulation of only half of the device is sufficient. For CMOS simulation, nMOS and pMOS
processes are independently simulated by OPUS and |
can be |
merged |
to form one CMOS device for the device simulation. |
This |
lessens |
the burden on the process simulation and could save CPU time and memories drastically.
Currently, we already have a standard device structure library including 2Dand 3D-MOSFETs, 2Danq 3D-exotic bipolar devices, CCDs, power devices and various 3D wiring capacitance.
For a linkage between ODESA and |
OCAP, the |
first |
choice |
was |
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to have a table look-up |
model. For |
a |
hand-free |
linkage of |
ODESA |
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and OCAP, analytical models may not be appropriate because |
of |
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difficulties in automatic |
parameter |
extraction. |
The |
number |
of |
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current/voltage data points for the input of OCAP is minimized
through |
error |
evaluation |
of |
currents and circuit delay |
time |
(tpd). |
In addition to current/voltage table data, junction |
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capacitance is |
also linked |
by |
tables simulated by ODE SA. |
Other |
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device-oriented parameters like flatband voltage and gate-drain overlap length are also automatically calculated from the device
structure for |
device |
simulation. |
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Thus, what are needed for engineers to run unified simula- |
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tions from |
process to circuit |
are |
only the |
upper-level |
operation |
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to control |
each |
simulation, |
in |
addition to |
process |
flow, bias |
points and netlist for process simulation, device simulation, and circuit simulation, respectively.
UNISAS is currently running on the computer network including a general-purpose machine with a vector facility and various work stations. UNISAS is being used extensively by many engineers at OKI for a cost-effective, fast development of various VLSIs.
3.Descriptlon of Tools
In this chapter, outlines details of our major in-house simulators are described.
3.1 General-purpose simulators A)OPUS
OPUS[4,6) is a general-purpose multi-dimensional process simulator intended to simulate arbitrary structures.
OPUS is composed of two programs: (a) pre-processor PPPS, and (b)numerical simulator PSS. The inputs of PPPS are process flow by users and physical constants. PPPS interprets these inputs, checks the grammatical and also logical errors in these inputs, extracts physical data pertinent only to this specific simula-
K. Nishi et &1.: Technology CAD at OKI |
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267 |
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distribution after |
LOCOS(a) |
and |
cooling |
down |
to |
room |
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temperature(b). |
The |
stress after cooling |
down |
is |
much |
larger |
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than that of right after LOCOS due to thermal mismatch |
between |
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oxide and nitride. |
We |
have found |
that |
these |
stress values |
depend |
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on the |
cooling temperature. These |
kind of analyses are possible |
only by |
viscoelastic modeling. |
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Another interesting application |
of viscoelastic modeling is |
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to the stress redistribution of. metal interconnect during temperature cycles. Fig.13 shows the simulation and experimental stress values of a plane aluminum on a oxide film[91 during
temperature |
cycles with a parameter of different heating (cool- |
ing) rate. |
Different hysteresis curves were simulated for the |
first time, which shows excellent fit to the experiments. Simulation of a submicron aluminum interconnect was also carried out and is shown in Fig.14. The stress values are in good agreement
with |
experiments, suggesting that viscoelastic modeling |
can |
be |
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used |
to stress |
migration of a aluminum interconnect. |
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VELMOT |
can run |
with an output file of OPUS. Thus, |
it is |
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easy |
to do |
oxidation |
simulation and stress calculation |
with |
a |
realistic structure. A future challenge is the stress dependent diffusion modeling using stress distribution calculated by VELMOT.
C)MONTES
MONTES is a 20 MOSFET device simulator based on Monte Carlo method. MONTES employs a modified window Monte Carlo method in which a conventional window is enlarged for the calculation of Poisson equation. This reduces the CPU time drastically without losing accuracy. Thus, typical CPU time to 1 hour and enables a simulation of realistic MOSFETs with a high drain concentration.
Physical models include non-parabolic band for both electrons and holes, a Brooks-Herring scattering model modified to account for high-doping region, carrier-carrier scattering and
surface roughness |
model. |
Impact ionization is also included in |
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the lucky-electron |
model |
with a soft-threshold energy. |
Fig.1S |
shows a simulation example of MOSFET. Here, impact ionization is
calculated |
and carriers generate at the region where carriers |
surpass the |
electric field maximum point. |
Fig.16 shows the drain current versus effective channel length of MOSFETs. Here, solid line indicates experimental data,
squares |
indicates |
the results |
by drift |
diffusion model, and |
circles |
indicates |
the results by |
MONTES. |
For longer channel- |
devices, we see excellent agreements among the three, which
indicates the effectiveness |
of the |
Montes. However, the results |
by a drift-diffusion model are |
smaller |
than experiments with |
