Книги2 / 1993 Dutton , Yu -Technology CAD_Computer Simulation
.pdf5.4. THRESHOLD VOLTAGE IN NONUNIFORM SUBSTRATE 219
and Vas = VaB - VSB. However, we customarily use the surface potential to represent the gate voltage at the applied bulk bias. Thus
Vas = Vox + <Ps - 1/Jao - VSB |
(5.60) |
where Vox is the voltage drop across the oxide layer from the gate to the substrate and is equal to
(5.61)
where Qbulk is the net charge in the substrate (per unit surface area). We now consider a special case that Qbulk =O. This is the situation of flat band, and
VFB = Vas(Qbulk = 0) = |
- Qf + <PsF - 1/Jao - VSB |
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Cox |
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~MsIBUb _ |
Qf + <PsF - VSB (5.62) |
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q |
Cox |
One can see that the only difference in the expression of the Hatband voltage for uniformly and nonuniformly doped substrate is the surface potential at the flat band condition. Also we have explicitly included the effect of body bias in the expression for VFB. One remaining issue is how to evaluate the surface potential at the flat band condition. In general it has to be solved numerically in device simulation using zero surface electric field as the boundary condition for the substrate. But in most cases, there is a simple way to calculate it. That is, if the quasineutral condition can be assumed in the surface and the bulk parts of the substrate at the flat band condition, which is true in most cases, <PsF can simply be evaluated as
,J.. |
kT I |
NAsub |
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n NA(O) |
(5.63) |
where we have assumed a p-type substrate, i.e., for n-channel MOS structure, and NABub and N A(O) are the doping concentrations in the bulk part and at the surface of the substrate, respectively. An interesting point is that if we substitute the above expression to Eq. (5.62), we would find that in fact
VFB = ~MSIsurface _ |
Q f - VSB |
(5.64) |
q |
Cox |
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220 CHAPTER 5. MOS STRUCTURES
That is, the fiat band voltage is the same as the one if the substrate is uniformly doped to the surface concentration. This is remarkable in that it is easy to compute VFB for most nonuniformly doped situations.
Now we can write the expression for Vas using the above derived VFB as follows
Qbulk |
<PsF |
(5.65) |
Vas = VFB - -c + <Ps - |
ox
The bulk charge, Qbulk, is the net charge (per unit surface area) of the substrate and appears only in the surface region. It can be partitioned into mobile and fixed parts. The mobile charge is due to the minority carriers (as opposed to the substrate bulk doping type) in either the surface inversion layer (for enhancement MOS) or the buried layer (surface implanted layer which has the opposite type of doping to the substrate and is usually in depletion MOS). And the fixed charge is the uncompensated, ionized dopants in the surface space charge region.
For simplicity, in the following we only deal with the enhancement MOS devices in which the "on" state is due to the formation of the surface inversion layer. As discussed in previous sections, for the inversion layer to occur, the surface potential must exceed, in magnitude, a certain value which is determined by the substrate doping. Further to consider the bulk bias effect, the condition for an inversion layer to appear is
(5.66)
where 'l/Jcrit = 2<PF and the ">" sign means that the left-hand-side term is larger than the right-hand-side term by a few times the thermal voltage. As in Section 5.2, <PF = <PFn for n-substrate and <PF = <PFp for p-substrate. But for the nonuniformly doped substrate there remains a question as to which doping density in the substrate is to be used to compute <PF. We will delay the discussion of computation of <PF for the moment. Under the condition of Eq. (5.66), the (inversion layer) channel charge can be approximated to [5.1]
1 - |
Vi |
<PsF I |
(1 _ e(I4>.-4>sFI-I1Pcrit+VsBI)/Vt ) |
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I<Ps - |
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(5.67) where QB is the charge in the space charge region and for p-substrate it is
(5.68)
5.4. THRESHOLD VOLTAGE IN NONUNIFORM SUBSTRATE 221
where Xd is the width ofthe surface space charge region and the effect on the overall space charge of the possible existence of the remnant electric field at Xd due to the nonuniform doping is neglected. Thus
(5.69)
In the definition of the threshold voltage, we often use the channel charge, Qch, as a parameter after the inversion occurs at the surface region. Thus a practical issue is that given Qch how one determines the surface potential, ¢>s, and the depletion region width, Xd. Antoniadis (5.2J derived from Eq. (5.67) the relation between ¢>s and Qch as follows.
¢>s - ¢>sF = ?{Icrit + VSB ± Vtln {cPs ~cPSF [(~~ + 1)2 -1] + I}
(5.70) where the "+" sign is for p-type, and "-" sign for n-type substrate, respectively. It is easy to see that if Qch = 0 is set as the criterion for the threshold voltage, then
cPs - ¢>sF = ?{Icrit + VSB |
(5.71) |
For VSB = 0, this is reduced to exactly the same form as in Eq. (5.22). We now need to find an equation for solving Xd. Integrating the
Poisson's equation in the space charge region, (0, XdJ, one obtains
(5.72)
Notice that from Xd to the substrate contact the substrate is in the quasi-neutral condition, and so
(5.73)
Combining Eqs. (5.72-5.73) and Eq. (5.70) results in a transcendental equation for Xd, which can be solved by the iteration method such as the Newton-Raphson method (Appendix A). There is still a remaining issue as to which doping concentration, N, in the substrate should be used to compute ?{Icrit - the onset criterion for the inversion layer. A straightforward choice is to let either N = N(O) or N = Nsub. However Antoniadis proposed a formula [5.2], which is more accurate and
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CHAPTER 5. |
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applicable to a variety of channel doping profiles, that |
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(5.74) |
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where N = Eq. (5.70).
The situation for depletion-mode MOS (depletion-MOS) devices is more complicated for it involves the substrate containing a pn junction space charge region. But the principle discussed above for enhancementMOS can equally be applied. Interested readers are referred to [5.3].
In the following we give an example of threshold voltage calculation for an enhancement n-channel MOS using the above semi-analytical approach, and compare the results with SEDAN simulation. The criterion for the threshold voltage is chosen as Qch = 0. The structure of this example is shown in the form of SEDAN input (Figure 5.7). The doping profile can be expressed as an analytical form of N A ( x) = 8 x 1016 exp[-(x - 0.5)2/0.52] + 1015 cm-3 , where the units of x are in f,Lm. If we compute </>Fp based on the bulk doping (1015 cm-3 ), then c/>Fp = 0.292V. Assume VSB = 2V, and start solving Eq. (5.70) for Xd using an initial guess of Xd = O.lf,Lm. Combining Eqs. (5.72-5.73) and
Eq. (5.70) and substituting all known values results in the following |
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nonlinear equation |
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F(Xd) = 123.7 foXd xe-[(x-O.5)/O.5]2dx + 0.0259 [(Xd ;50.5r-1] |
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-2.496 = 0 |
(5.75) |
The above equation can be solved using the Newton-Raphson method, and the Jacobian matrix during the iteration has the form of
(5.76)
The Newton-Raphson method takes five iterations to converge to the solution Xd = 0.255 f,Lm with a precision of six digits. We are now able to compute the space charge in the surface depletion region, QB, using Eq. (5.68), and the result is QB = -1.877 x 10-7 Coul/cm-2 • The surface potential at the flat band condition, c/>sF, is evaluated by using Eq. (5.63), and the result is c/>sF = -0.088 V. The gate-substrate work function difference as measured from the bulk is <pMsls'Ub = -0.805 V,
5.4. THRESHOLD VOLTAGE IN NONUNIFORM SUBSTRATE 223
title |
MOS Capacitor with Non-uniform Doping |
comment |
p-substrate with channel implantation |
material si |
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device |
mos oxth=O.l wgate=4.1 |
grid |
nreg~l steps-O.l nstep=l |
grid |
nreg=2 steps=O.0005 nstep=20 |
grid |
nreg=3 steps=O.0025 nstep=156 |
grid |
nreg=4 steps=O.Ol nstep=200 |
comment |
analytical profile |
profile |
anal |
profile |
nlay=l cons begin=O.O end=2.5 conc=1.0e15 |
profile |
nlay=2 gimp range=O.5 charlen=O.5 peakcon=8.0e16 |
bias |
vgsf=2.8 vgsl=2.8 vsbf=2.0 vsbl=2.0 |
model |
srhr auger |
log |
vsb=2.0 vgs=2.8 e.field net hole e.psi |
solve |
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end |
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Figure 5.7: Threshold voltage computation for an n-channel enhancement-MOS with a Gaussian channel doping profile.
and that measured from the surface of the substrate is ~M S Isurface = -0.893 V. The threshold voltage thus computed is 5.143 V as compared to the SEDAN result of 5.16 V, a difference of only 0.3%. The only
numerical computation needed in the above semi-analytical approach is the integration of xN(x) which has to be done numerically even N(x) has an analytical form.
One thing which has to be noticed from SEDAN simulation is that at the above calculated gate-source voltage, the surface electron concentration is only 3.25 x 1013 cm-3 as compared to the surface doping density of 3.04 x 1016 cm-3 • This is an indication that 'l/Jcrit has not yet been properly chosen.
Even we carefully choose the right 'l/Jcrit as suggested in Eq. (5.74),
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CHAPTER 5. MOS STRUCTURES |
the value of the threshold voltage obtained from this type of definition (Le., choose a fixed number of inversed channel charge as the criterion) is different from what circuit community used to use. In circuit application, the threshold voltage for MOS structure is usually defined as the intercept on VGS axis of the extrapolated linear part of IDS vs. VGS using VSB as the parameter. Translated to the channel charge, it amounts to defining the threshold voltage as
(5.77)
The right-hand-side terms are all evaluated at a fixed VSB. We name this definition of threshold voltage as "extrapolated" threshold voltage. One question remained to be answered is at which Qch to compute all those quantities. This is actually a matter of definition, but it is proven by many practices to be crucial to match the experimental data. An empirical value used by both SUPREMjindexSUPREM and some other authors [5.2] [5.3] is Qch = 3 X 10-8 Couljcm2 for both enhancementMOS and depletion-MOS with oxide thickness 200A or thicker. When the gate oxide thickness is less than 200A , Qch should be chosen bigger than the above value [5.3].
In the next section we will use the "extrapolated" threshold voltage to analyze both the enhancement and depletion MOSFETs in practical structure. Wherever possible, we will use analytical approach to give readers more physical insight.
5.5MOS Device Design by Simulation
In the previous sections we have derived and discussed many of the fundamental model equations needed to represent the MOSFET device. In Section 5.2 we emphasized the vertical 1D Poisson's equation solution, while in Section 5.3 the equations for lateral surface current flow were discussed. In this section we will consider the use of SUPREM and SEDAN/PISCES for analysis of practical MOS structures. In Chapter 4 we have already considered the source/drain junction regions. The emphasis here is specifically on the channel region.
5.5. MOS DEVICE DESIGN BY SIMULATION |
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5.5.1Body-bias Sensitivity of Threshold Voltage
Recalling the technology summary given in Chapter 1, the two typical channel profiles are again shown as in Figure 5.8 (a) and (b). For the n-channel device the substrate is uniformly p-doped (9 x 1014 cm-3 ) and the threshold adjustment gives rise to the boron peak concentration of 1.9 x 1016 cm-3 , shown in Figure 5.8 (a). The p-channel device is constructed in an n-well with phosphorus surface concentration of 5 x 1015 cm-3 and junction depth of 0.31JLm. The boron implant used for the n-channel device also adjusts the p-channel threshold voltage - however, in this case, it is a counter-doping effect of the n-well that shows a dip in the near-surface peak concentration of nearly an order of magnitude. For both the n- and p-channel devices the substrate doping profiles are highly nonuniform. In light of our earlier discussion of threshold voltage in Section 5.2, it becomes much more difficult to define a value for N A and N D to represent the substrate - it is clearly a function of position. This can most easily be seen by considering the change in extrapolated threshold voltage with changes in substrate (bulk) to source bias, l1BS, as observed in Figure 5.9. Here the simulated channel charge is shown as a function of gate voltage with body bias as a parameter.
Considering again Eq. (5.29), but now allowing the surface potential in the expression for QB to be adjusted by l1sB, the following expression for l1sB -dependent threshold voltage, liT (l1SB ), is observed for p-channel devices.
VTF(l1SB) = |
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(5.78) |
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or for n-channel |
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l1TF(VSB) = |
2<PFp + Cox V2qfsNA(2<PFP + VSB) |
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where the subscript T F represents that the threshold voltage is based on the flat band assumption.
Now, including the flat band voltage shift and rewriting the equations in terms of the respective VT terms given by Eq. (5.36), we get for p-channel devices
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(5.80) |
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Depth (urn)
(b)
Figure 5.8: Channel doping profiles for (a) n-channel device. Broken lines show the edges of the depletion regions at different substrate biases when the surface electron concentration reaches the surface doping concentration. (b) p-channel device. Broken lines show the electron profile at various substrate biases and hole profile at VSB = 0 corresponding to the channel hole density of 3 x 10-8 Coul/cm2 •
5.5. MOS DEVICE DESIGN BY SIMULATION |
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3xl 0.8 couVcm2
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(b)
Figure 5.9: Channel charge versus gate voltage with VSB as a parameter for (a) the n-channel device, (b) the p-channel device.
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and for n-channel devices |
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VT(VSB) = VTO + |
"J2q£sNA [ |
(2¢>Fp + VSB) |
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2¢>Fp |
)1/2] |
(5.81) |
Cox |
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where VTO represents the threshold voltage for zero body bias (VSB = 0). The physical interpretation of the second terms on the right-hand-sides of the above equations is as follows. The first term in the brackets is the correction term as needed in Eqs. (5.78-5.79) and the second term in the brackets is subtracted from the VT term to remove the redundant QB contribution from VTO' While such an equation form seems somewhat strange, its value will become immediately apparent. Figure 5.10(a) shows the plot of VT vs. VSB of n-channel MOS devices as represented using Eq. (5.81) for two values of NA. Clearly, as NA increases both the VT value and the slope of VT vs. VSB increase. That is, the dependence of VT on substrate bias increases much more rapidly for higher substrate doping levels. Shown in Figure 5.10 are the simulated curves and idealized plots in the case of uniformly doped substrates for both types of MOS devices although in the actual CMOS process both the p- and n-channel devices are very definitely nonuniformly doped as shown in Figure 5.8.
Note that compared to the simple equations the SEDAN results show some specific differences. Especially for the n-channel devices, there is a clear two-slope behavior of VT vs. VSB. The above formulation of the threshold equations and the demonstration of the impact of doping level on VT vs. VSB opens the way for a general discussion of threshold voltage for arbitrarily doped devices. In the following we will formulate a general approach for determining threshold voltage, derive and justify the various components of the threshold equation and look briefly at comparison with simple analytical forms.
Consider first the n-channel device with nonuniform boron profile as shown in Figure 5.8 (a). Figure 5.11 shows the SEDAN input file used to analyze the substrate bias sensitivity of the threshold voltage. An example using PISCES to do the same type of analysis is given in Appendix C. Two alternative approaches to specifying the doping profile are indicated. First, we can take the profile data directly from SUPREM III as is indicated in the input file to PISCES in Appendix C. In the case of modeling an established process this can be very efficient. On the other hand, if the process is being designed, the re-simulation of each proposed process change may be excessive. The second approach
