Книги2 / 1993 Dutton , Yu -Technology CAD_Computer Simulation

performed . These simulated experiments yield explicit results and can provide a deeper understanding of the underlying physical mechanisms. In contrast, the real experimental approach is limited in several ways. First, internal features of the device such as doping profiles and depletion edges are not "visible." Second, experimental changes require substantial time and effort. Finally, inherent experimental errors result in uncertainties as to which effect is responsible for the measured change. For instance, in laboratory experiments, fixed parameters such as oxide thickness may also vary due to random fluctuations.

Consideration of Eq. (3.1) can also provide useful insight into the role of device simulation in circuit design. The approach typically used to find numerical values for the parameters in Eq. (3.1) is to plot ID vs. VGS with VSB as a parameter as shown in Figure 3.I.

The first-order equation for a small VDS describing this data is

(3.3)

where k' = J.1.Cox and J.1. is the carrier mobility, W / L is the device aspect

ratio (gate width over gate length), and VT(VSB) is given by Eq. (3.1). For a fixed VDS which is small compared to <Ps, the intercept of the

VGs-axis and the extrapolation of the linear part of the ID curve gives

threshold voltage as a function of the substrate bias, VSB. The parameters k', ,,(, and <Ps, can be optimized to fit the data. However, it must be

assumed that an effective substrate doping is appropriate and that the 1/2-power law applies. One advantage of simulated experiments is that the "data" are created independent of these assumptions. The correctness of the 1/2-power law either for substrate bias or for the effective substrate doping is not important. In fact, the simulation determines exact profile and model equations. Thus, device simulation lets the circuit designer identify process dependencies, which can then be used to speed the process of technology optimization.

The above example illustrates the advantages of device simulation from two points of view - that of the device and circuit designers. Device model equations are essential to the design process. They parameterize the design variables into a form that is easily understood and thereby usable for design. The device simulator provides a tool to help "debug" and even redefine device models. Moreover, the simulator is fast and cheap compared to the actual fabrication and characterization processes. Also, the device simulator provides precise control over parameters and

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Figure 3.1: Typically observed ID vs. VGS relationships for a MOSFET (n-type substrate) and simulated inversion charge Q vs. Vas. (a) shows the MOSFET behavior as measured, (b) shows the simulated results - both have substrate bias VSB as a parameter.

where u is the net recombination rate and the expressions of current densities are

(3.7)

(3.8)

where [; = -a'IjJ/ax is the electric field, and Dn and Dp are diffusion constants for electrons and holes, respectively.

The SEDAN/PISCES programs solve this coupled nonlinear set of differential equations using a numerical analysis technique called finite difference method on a discrete grid. This section considers particular examples from the user's perspective. Even though both programs do well, for simplicity we will just use SEDAN to step through the set up of a problem and the analysis and interpretation of the results. The PISCES counterparts can be found in Appendix C.

3.2.2User Input for SEDAN

SEDAN has been built as a generalized one-dimensional device simulator. Hence, the set of Eqs. (3.4 - 3.8) are solved completely for all nodes in the device. Moreover, SEDAN has been enhanced (version III only) so that compound materials as well as silicon structures can be analyzed. For purposes of focus and simplicity we will consider only silicon in this book. To begin any simulation using SEDAN a minimum set of specifications are required; optional specifications allow the user to "tune" the values of specific parameters, if so desired.

Figure 3.2 shows a typical SEDAN input and output - the one used to generate the simulated data shown in Figure 3.1. The input deck consists of statements. The statement title gives output "header" information. The material is silicon and the device is a MOS capacitor. The oxide thickness is a required parameter while the interface charge qi is optional. The statement model is an all-inclusive "switching matrix" that can be used to turn selected details of models built into SEDAN "on" or "off." In the example shown in Figure 3.2 (a) the statement model contains data on

1.Recombination by the Shockley-Read-Hall (SRH) mechanism, which is turned "on."

n-channel threshold calculation. (a) shows the input deck and (b) shows a printed output for two computed variables - "q.ele" vs. Vas and "hole" vs. depth.

2.The "freeze-out" of dopants, which is turned "off" (by putting uparrow" A" before the parameter).

3.The "Auger recombination" of carriers, which is turned "off"

4.The temperature, which is set at 300°K.

The log, print, and plot statements specify the output desired, the solve statement initiates program execution and the end statement indicates the termination of the input file. The four remaining statements, that is, the bias, compute, grid and profile are not as simple to explain. The grid and profile specifications relate to physical factors while the bias and compute specifications relate to electrical factors. First, we will discuss the physical specification and then we will consider the electrical input.

The physical specification of a device can be viewed from two perspectives - analysis of devices that have already been built or designs of yet-to-be-built devices. In the case of devices that have already been built, structural information such as junction depths, oxide thicknesses, and doping concentrations can be measured experimentally. Analytic techniques such as spreading resistance probe or Secondary Ion Mass Spectrometry (SIMS) [3.3] data can give a "complete" profile of doping versus depth in one dimension and this profile can be input directly into SEDAN (or PISCES) in tabular form. However, due to experimental uncertainties such as probe calibration and correction factors, the use of analytic profiles fitted to the experimental data is much to be preferred. SEDAN provides a variety of functions and adjustable parameters to accomplish this fitting. Constant, exponential, gaussian, and complementary error function (erfc) distributions are all available. Moreover, the functions can be connected in a piecewise continuous way over as many as ten "layers" (see profile statement description). In subsequent examples the concept of "layers" and "doping functions" will be used extensively. The example shown in Figure 3.2 (a) contains two layers on the profile statement, one giving the uniform substrate doping and the other approximating the Gaussian-shaped boron implant used to adjust the MOS threshold voltage. In addition to the use of real data files, which are in ASCII format, or analytic approximations as input to SEDAN's profile statement, the program can also accept SUPREM-generated doping profiles. As indicated in the previous chapter, SUPREM can "save" (or "export") profiles and "load" them for fur-

14~~~~~~~~~JJ~-W~~~--~

Figure 3.3: Comparison of SUPREM-generated n-channel doping profile and the analytical fit based on SEDAN input (shown in Figure 3.2).

ther simulation. SEDAN has an analogous feature to "load" a "saved" SUPREM profile as part of the profile input specification. Thus, a designer can create a SUP REM file based on actual process steps, confirm the SUPREM results by experiment, and then use SEDAN /PISCES to predict device parameters.

Frequently we desire analysis of structures early-on in the design process - before silicon test devices are available. In this case, profile input represents a concept of what the structure will be. Using the analytic profile input to SEDAN a designer can see how the desired electrical features of a particular structu:r;e depend on the profile inputs. Then the designer can use SUP REM to construct a process that realizes these target analytic profiles. Based on reasonable success with SUPREM, the simulated profiles can be used as input to SEDAN. Figure 3.3 compares SUPREM-generated and SEDAN analytic profiles for a simulated MOS process (see Exercise 1-2). As can be observed, agreement of the resulting profiles is quite good. In Figure 3.2 (a) the "analytic profile" input is used for SEDAN. Once the profile information is available in

SEDAN, the statement grid must be specified. The general case of a multilayered structure containing both constant and rapidly changing doping profiles can be a difficult problem. Two approaches are used in SEDAN. "automatic" gridding can be done under program control. In this case the program looks for junction or interface positions to decide on minimum spacings and then spaces grid nonuniformly away from these local minima according to a geometric progression described in the manual. The user may not wish to use this feature for several reasons. Certainly uniform grid can make things conceptually easier to think about. Also, if the analytic profiles are used, the user has an excellent understanding of regions and how to most efficiently break them up. In this case the user specifies stepsize and number of steps for each of the numbered regions (Le. layers in the profile specification). The input shown in Figure 3.2 (a) shows the manual options for the MOS example. Whether the grid is auto or manually generated, the user must be aware of how grid spacing affects simulation results. From a numerical point of view there is a complex set of relationships between grid spacing and numerical errors (refer to Appendix A). The choice of grid spacing can be critical in relationship to the control of time step for time-dependent simulation also. For the moment we will bypass the numerical issues and address only the physical points. Namely, for accurate device simulation one must be prepared to resolve critical physical effects wherever they occur. For example, to accurately model inversion charge, the grid must be dense near the surface of the MOS device. To accurately resolve depletion region edges one must be aware of characteristic distances over which they spread - namely the extrinsic Debye length. These are only two examples - we will see others as we proceed in the text. The final point to be made is that careful specification of grid and understanding of how the grid affects the results will be key concerns as the user of device simulation becomes more skilled. In subsequent exercises we will help the reader to develop these skills and to become comfortable in understanding the underlying physics.

Turning now to the electrical data input, the log, bias, and compute specifications are the remaining inputs introduced in Figure 3.2 (a). The compute input selects the electrical results to be simulated. For example, in Figure 3.2 (a) only the cmos option is selected, which means that MOS capacitance will be determined. For other examples we will determine junction capacitance, breakdown voltage, or even transistor cutoff frequency. Using SEDAN-computed results such as charge or current

versus voltage, the program computes electrical parameters useful for circuit design applications. One might ask why a parameter such as the current gain (f3) for a bipolar device or transconductance for aMOS device is not output as a computation variable. The answer is that parameters such as gain are bias-dependent. Hence, the most correct way to output the results is to give the simulated I vs. V curves as print or plot outputs and then to extract the needed circuit parameters for these data. The log statement is used to define what output files will be created for the print and plot options. The data is stored in files which can be read both by the program directly (binary format) and easily passed to other programs (ASCII format). The log statement al- lows both bias-dependent and depth-dependent data to be created. For example, the column labeled q. ele in the file named "charge" gives the bias-dependent charge shown in Figure 3.2 (b) while the column labeled hole in the file named "doping" gives the depth-dependent concentration discussed shortly with regard to Figure 3.7.

Turning finally to the bias specification, this input controls the bias voltages applied to the device being simulated. Each terminal voltage is specified in terms of a first, last, and step voltage - very much like the way one uses the "bias sweep" controls on an oscilloscope. Hence for the MOS device shown in Figure 3.2 (a) we are sweeping gate to source voltage from vgsf (first) to vgsl (last) in vgss (step). Each bias statement contains a unique "vbsf" input to indicate the body bias voltage assumed between the "channel" and bulk terminals. For

include sweep in diode and transistor bias conditions. The bias input allows sweeps of both base-emitter and collector-emitter voltages. Thus normal plots oflog-current versus VBE (Gummel plots) can be obtained. For the reverse mode of operation the user can specify "reverse" on the device input and the device will be turned over for the applied forwardbias conditions.

In summary, the above discussion has introduced the SEDAN program, primarily via an example for MaS device and threshold voltage calculations. The syntax for the input files to PISCES might be different, but the way to specify the device structure, bias condition, and solution to be observed is similar. One advantage with SEDAN is that it can analyze a broad range of one-dimensional device structures and at the sametimes provides the device parameters such as the threshold