Книги2 / 1993 Dutton , Yu -Technology CAD_Computer Simulation
.pdf2.4. IMPURITY DIFFUSION |
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CALCULATIONS |
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Figure 2.19: Semi-logarithmic plot of concentration versus depth comparing an ideal Gaussian diffusion profile with a numerical calculation including segregation (m = 0.1) to account for boundary removal of the dopant [2.41].
silicon atoms. Since Ie processing technology routinely uses oxidation during the diffusion step to create a masking layer for subsequent patterning, such oxidation effects are of major concern. The generation
of silicon interstitials during oxidation is closely linked to the oxidation rate, dXo/dt, as indicated by Figure 2.9. An empirical relationship to
describe the total point defect concentration is [2.19]
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(dXo)q |
(2.51 ) |
C[ =]([ |
dt |
The "." indicates an excess value above that at equilibrium; in this case, it is used to show the value for the concentration of excess interstitial silicon atoms. ]([ is an empirically determined constant of proportionality, Xo is the oxide thickness, and q is the power-law coefficient, presently thought to be less than unity. The total diffusivity
78 |
CHAPTER 2. |
INTRODUCTION TO SUPREM |
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can be thought of as |
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+ b.Do |
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D = D"A |
(2.52) |
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where DA is the non-oxidizing diffusivity given by Eq. (2.34) and b.Do is the new term for the excess contribution due to oxidation. We can express b.Do in terms of the excess silicon interstitial concentration as
(2.53)
where fAI is the fraction of dopant diffusing with interstitial point defects as defined in Eq. (2.31). As noted there, the values used for fAI were unreasonably low for the intrinsic condition. However, by increasing the coefficient J(l in Eq. (2.51), the correct overall effect can be reproduced. Given this enhancement factor, the total diffusivity is given as:
(2.54)
Note that if CI = 0 the diffusivity is simply DA, while if CI > 0 the diffusivity is enhanced.
The relative enhancement of diffusivity due to oxidation is significant, as shown by the experimental data in Figure 2.20 [2.42J. These figures plot diffusivity vs. inverse temperature for both oxidizing and inert ambient conditions. Note that at low temperatures there can be as much as an order of magnitude increase in diffusivity. Although the data in Figure 2.20 is for a dry oxidizing ambient, similar enhanced diffusion is observed in wet oxidizing ambients. Due to the different oxidation rates in wet and dry oxidizing ambients, the diffusivity enhancement is given by Eq. (2.51).
Consider the process steps leading to the phosphorus and boron profiles in the CMOS technology, Figures 1.14-1.15, respectively. Oxidation can significantly change the shape of the expected profiles. The SUPREM program has these effects built-in via the diffusion coefficients under oxidizing conditions, as well as through the oxidation rate constant and the power-law coefficient q. The enhancement of diffusivity due to excess interstitials is controlled by the model coefficient fAI to fit experimental results.
2.5Summary
This chapter gives an introduction and overview to process modeling using the SUPREM program. Initial examples give typical process
2.5. |
SUMMARY |
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TEMPERATURE (oC) |
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BORON |
DIFFUSIVITY |
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PHOSPHORUS DIFFUSIVITY |
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IN (100) SILICON |
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Figure 2.20: Oxidation-enhanced diffusivities for boron, and phosphorus (dashed lines) compared with those for inert ambient conditions (solid lines) [2.42].
sequences used in both MOS and bipolar technologies. The ensuing subsections give an overview of selected models used in SUPREMo Ion implantation is an essential component of modern IC fabrication and the default Pearson IV model gives excellent agreement with experiments. Also, by modifying the Pearson coefficients a broad range of conditions can be modeled. The model for oxidation includes many effects related to ambient conditions as well as substrate orientation. While the abundance of data and equations may seem overwhelming, the characterization of oxide thickness for these conditions is extensive. Also, since oxide thickness is critical to MOS device performance, it is essential that all such process variations be accounted for. Diffusion modeling is the final topic discussed in Chapter 2. Dopant diffusion is coupled to the oxidation growth in two important ways - segregation and enhanced (or retarded, which is not discussed) diffusion due to point defects generated during oxidation. SUPREM III accurately
80 |
CHAPTER 2. INTRODUCTION TO SUPREM |
models both ofthese effects. However, it does not model the retardation effects. For high-concentration diffusion, SUPREM includes features to account for concentration dependence of diffusivity and even for clustering of atoms as the concentrations approach solid solubility. These models show good agreement for arsenic data and similar effects are observed for other dopants. Research is still in progress to fully characterize these dependencies for phosphorus and boron, especially as processing temperatures are reduced and rapid thermal processing (RTP) is used. In the future we can expect to see significant improvements in high-concentration modeling - especially with the growing importance of bipolar and BiCMOS technologies.
2.6Exercises
2-1 Using the results of Exercise 1-4 and the details given in this chapter, generate and execute the SUPREM files for:
a)nfield, nch.ch
b)pfield, pch.ch
Note that this means that you also have to create and execute the intermediate files as well. Use the "print" command to determine the following quantities:
i)Bi and (B/A)i during the wet field oxidation step (nfield)
ii)boron diffusion and segregation coefficients (excluding the OED effects) during gate oxidation (nch.ch)
iii)phosphorus diffusion and segregation coefficients (excluding OED) during the wet field oxidation step (pfield)
iv)the junction depth for the n-well (pfield)
v)the oxide thickness for the p-channel device (pch.ch)
Add this information as annotations on the plots of log concentration versus depth for parts a) and b).
2-2 Consider the n-well process described in Figure 2.1. Execute the sequence and check to see if the oxide thickness matches that specified
2.6. EXERCISES |
81 |
in the process flow described in Chapter 1. Adjust the partial pressure coefficient "pres" to achieve agreement.
2-3 Again consider the n-well steps considered in Exercise 2-1. Modify the fraction interstitialcy coefficient "fii. 0" for phosphorus to a value of 0 and determine the effects of OED on the junction depth. By what percentage has it changed?
2-4 In masking step # 2 shown in Figure 2.1 (a), the nitride layer can be used to mask the p+ channel-stop implant. Using the details given in Chapter 1, determine the minimum thickness required for the nitride layer to mask 90% of the p+ implant as shown.
2-5 Using the results of Exercise 1-4 and the details given in this chapter, generate and execute the SUPREM files for
a)nch.sd
b)pch.sd
Note: this means that you also have to create and execute the intermediate files as well. Use the parameters on the "arsenic" and "boron" commands to simulate and quantify the following:
i)set the arsenic pre-exponential factor for D- to zero and compare the concentration profile (nch.sd) and junction depths.
ii)Set the boron pre-exponential factor for D+ to zero and compare concentration profile and junction depth with the nominal condition (pch.sd).
2-6 Using the default coefficients for arsenic diffusion and the process flow given in Figure 3.12, add a boron implant and diffusion steps to create a base-like profile. That is, use the thermal cycle used for the n-channel threshold adjustment/gate oxidation (before the arsenic implant step, of course), but alter the boron implant parameters to achieve a boron profile with integrated doping in the base region of 1012 cm-2. (Use an n-type substrate of uniform 1015 cm-3 concentration.)
82 |
CHAPTER 2. INTRODUCTION TO SUPREM |
2.7References
[2.1] S. Selberherr, Analysis and Simulation of Semiconductor Devices, New York, Springer-Verlag, 1984.
[2.2] J. W. Mayer, L. Erikson, and J. A. Davies, Ion Implantation in Semiconductors, New York, Academic Press, 1974.
[2.3] J. Gibbons and S. Mylroie, "Estimation of impurity profiles in ion-implanted amorphous targets using joined half-Gaussian distributions," Appl. Phys. Lett., 22, pp. 568-569, June 1973.
[2.4] W. K. Hofker, D. P. Oosthoek, N. J. Koelman, and H. A. M. De Grefte, Radiation Effects, 24, p. 223, 1975.
[2.5] H. Ryssel, H. Kranz, K. Muller, R. A. Henkelmann, and J. Bier-
sack, "Comparison of range and range straggling of implanted lOB and 11 B in silicon," Appl. Phys. Lett., 30, pp. 399-401,
April 1977.
[2.6] L. A. Christel, J. F. Gibbons, and S. Mylroie, "Application of the Boltzmann transport equation to ion range and damage distributions in multilayered targets," J. Appl. Phys., 51, pp. 61766182, December 1980.
[2.7J G. Hobler, and S. Selberherr, "Monte Carlo simulation of ion implantation in twoand three-dimensional structures," IEEE Trans. CAD, Vol. 8, No.5, p. 450-459, May 1989.
[2.8] B. J. Mulvaney, W. B. Richardson, and T. L. Crandle, "PEPPER - A process simulator for VLSI," IEEE Trans. CAD, Vol. 8, No.4, pp- 3336-349, April 1989.
[2.9J B. E. Deal and A. S. Grove, "General relationship for the thermal oxidation of silicon," J. Appl. Phys., 36, p. 3770, 1965.
[2.10J J. D. Plummer, "The Role of the SijSi02 interface in silicon oxidation kinetics," Electrochem. Soc. Semiconductor Silicon, 1981, pp. 445-454, May 1981.
[2.11] R. B. Fair, "Oxidation, impurity Diffusion, and defect growth in silicon - An overview," J. Electrochem. Soc., 128, p. 1360, June 1981.
2.7. REFERENCES |
83 |
[2.12] S. M. Hu, "Formation of stacking faults and enhanced diffusion in the oxidation of silicon," J. Appl. Phys., 45, pp. 1567-1573, Apri11974.
[2.13] W. A. Tiller, "On the kinetics of the thermal oxidation of silicon, 1. A Theoretical perspective," J. Electrochem. Soc., 127, pp. 619-624, March 1980.
[2.14] C. P. Ho and J. D. Plummer, "Si-Si02 interface oxidation kinetics: A physical model for the influence of high substrate doping levels. I. Theory," J. Electrochem. Soc., 126, pp. 1516-1522, September 1979.
[2.15] C. P. Ho and J. D. Plummer, "Si-Si02 interface oxidation kinetics: A physical model for the influence of high substrate doping levels. II. Comparison with experiment and discussion," J. Electrochem. Soc., 126, pp. 1523-1530, September 1979.
[2.16] P. S. Dobson, "The Effect of oxidation on anomalous diffusion in silicon," Philosophical Mag., 24, pp. 567-576, 1971.
[2.17] P. S. Dobson, "The mechanism of impurity diffusion in silicon," Philosophical Mag., 26, pp. 1301-1306,1972.
[2.18] S. P. Murarka, "Role of point defects in the growth of the oxidation-induced stacking fault in silicon," Phys. Rev. B, Vol. 16, pp. 2849-2857, 1977.
[2.19] A. M. Lin, R. W. Dutton, D. A. Antoniadis, and W. A. Tiller, "The growth of oxidation stacking faults and the point defect generation at Si-Si02 interface during thermal oxidation of silicon," J. Electrochem. Soc., 128, pp. 1121-1130, May 1981.
[2.20] D. W. Hess and B. E. Deal, "Kinetics of the thermal oxidation of silicon in 02HCl mixtures," J. Electrochem. Soc., 124, pp. 735-739, May 1977.
[2.21] B. E. Deal, "Thermal oxidation kinetics of silicon in pyrogenic H2 0 and 5% HCI H20 mixtures," J. Electrochem. Soc., 125, pp. 576-579, April 1978.
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CHAPTER 2. INTRODUCTION TO SUPREM |
[2.22] |
R. R. Razouk, L. N. Lie, and B. E. Deal, "Kinetics of high pres- |
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sure oxidation of silicon in pyrogenic steam," J. Electrochem. |
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Soc., 128, pp. 2214-1110, Oct. 1981. |
[2.23] L. N. Lie, R. R. Razouk, and B. E. Deal, "High pressure oxidation of silicon in dry oxygen," J. Electrochem. Soc., 129, pp.
2828-2834, Dec. 1982.
[2.24] Y. J. van der Meulen, "Kinetics of thermal growth of ultra-thin layers of Si02 on silicon. I. Experiment," J. Electrochem. Soc.,
119, pp. 530-534, 1972.
R. Ghez and Y. J. van der Meulen, "Kinetics of thermal growth of ultra-thin layers of Si02 on silicon. Part II. Theory," J. Electrochem. Soc., 119, pp. 1100-1106, 1972.
[2.25] B. E. Deal and M. Sklar, "Thermal oxidation of heavily doped silicon," J. Electrochem. Soc., 12, pp. 430-435, April 1965.
[2.26] W. Shockley and J. 1. Moll, "Solubility offiaws in heavily doped semiconductors," Phys. Rev., 119, pp. 1480-1482, Sept. 1960.
[2.27] J. A. Van Vechten, and C. D. Thurmond, "Entropy of ionization and temperature variation of ionization levels of defects in semiconductors," Phys. Rev. B .. 14, p. 3539, October 1976.
[2.28] R. J. Kriegler, Y. C. Cheng, and D. R. Colton, "The effect ofHCl and Ch on the thermal oxidation of silicon," J. Electrochem. Soc., 119, pp. 388-392, 1972.
[2.29] P. H. Robinson and F. P. Heiman, "Use of HCI gettering in silicon device processing," J. Electrochem. Soc., 118, pp. 141143, 1971.
[2.30] C. M. Osburn, "Dielectric breakdown properties of Si0 2 films grown in halogen and hydrogen containing environments," J.
Electrochem. Soc., 121, pp. 809-815, 1974.
[2.31] K. Hirabayashi and J. Iwamura, "Kinetics of thermal growth of HCI-02 oxides on silicon," J. Electrochem. Soc., 120, pp.
1595-1601,1973.
2.7. REFERENCES |
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[2.32] Y. J. Van der Meulen, C. M. Osburn, and J. F. Ziegler, "Properties of Si02 grown in the presence of HCI or CI2 ," J. Electrochem. Soc., 122, pp.284-290, 1975.
[2.33] A. S. Grove, Physics and Technology of Semiconductor Devices,
John Wiley and Sons, New York, 1967.
[2.34J H. Z. Massoud, J. D. Plummer, and E. A. Irene, "Thermaloxidation of silicon in dry oxygen: growth rate enhancement in the thin regime. 1. Experimental results," J. Electrochem. Soc., 132, pp. 2685-2693, Nov. 1985.
[2.35] P. M. Fahey, P. B. Griffin, and J. D. Plummer, "Point defects and dopant diffusion in silicon," Reviews of Modern Physics, Vol. 61, No.2, pp. 289-384, April 1989.
[2.36J C. P. Ho, S. E. Hansen, P. M. Fahey, "SUPREM III-A Program for Integrated Circuit Process Modeling and Simulation," Stanford Technical Report, SEL 84-001, July 1984.
[2.37] M. E. Law and R. W. Dutton, "Verification of analytic point defect models using SUPREM - IV," IEEE Trans. ComputerAided Design, Vol. CAD-7, pp. 181-190, Feb. 1988.
[2.38] R. B. Fair, "Chapter 7: Concentration profiles of diffused dopants in silicon," Impurity Doping Processes in Silicon, edited by F. F. Y. Wang, North-Holland Pub. Co., Amsterdam, 1981.
[2.39] D. A. Antoniadis, R. W. Dutton, "Models for computer simulation of complete IC fabrication process," IEEE Trans. Elect. Dev., Vol. ED-26, No.4, pp. 490-500, April 1979.
[2.40] M. Y. Tsai, F. F. Morehead, J. E. E. Baglin, and A. E. Michael, "Shallow junctions by high dose As implants in Si: Experiments and modeling," J. Appl. Phys., 51, p. 3230, 1980.
[2.41] T. Kato, Y. Nishi, "Redistribution of diffused boron in silicon by thermal oxidation," Japan. J. Appl. Phys. 3, p. 377, 1964.
[2.42] A. M. Lin, D. A. Antoniadis, R. W. Dutton, "The oxidation rate dependence of oxidation-enhanced diffusion of boron and phosphorus in silicon," J. Electrochem. Soc., 128, p. 1131, May 1981.
Chapter 3
Device CAD
3.1Introduction
Device and circuit design involve detailed understanding of device models. For both these design stages, details such as the role of substrate doping on threshold voltage and capacitances of MOSFETs must be characterized in terms of parametric equations. For example, a simplified equation for MOS threshold voltage is:
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(3.1) |
where |
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I = C1 j2qfs N sub |
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ox |
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is called the body modulation coefficient, VTO is the threshold with no substrate bias (VSB = 0), and CPs is the surface potential at strong inversion. In Eq. (3.2), N sub is the effective substrate doping (to be defined later), Cox is the gate insulator capacitance, and fs is the dielectric constant of silicon. This first-order threshold equation, available in the SPICE circuit simulation program, brings several questions to mind:
1.What is the meaning of "an effective substrate doping"?
2.Is the 1/2-power law really accurate for the device in question?
3.What is CPs from an experimental point of view?
One role of device simulation is to provide answers to questions such as these. For each question, a set of controlled "experiments" can be
