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TECHNOLOGY CAD

COMPUTER SIMULATION

OF IC PROCESSES

AND DEVICES

TECHNOLOGY CAD

COMPUTER SIMUlATION

OF IC PROCESSES

ANDDEVICES

Robert w. Dutton

Stanford University

and

Zhiping Yu

Tsinghua University

Springer Science+Business Media, LLC

To our parents who have motivated our love of learning and to our wives who have nurtured our academic and personal growth, and finally to Fely Barrera who sustained us with friendship, humor, and many long hours of word-processing.

Contents

Preface				xiii
1 Technology-Oriented CAD				1
1.1	Introduction. . . . . . . . .........			1
	1.1.1	IC Technology Development . . . .		1
	1.1.2	Overview of Subsequent Chapters		3
1.2	Process and Device CAD ...			5
	1.2.1	Introduction	· .....	5
	1.2.2	History of Device CAD		5
	1.2.3	Motivation for Process CAD		7
	1.2.4	The Role of Process CAD for Device CAD		10
1.3	Process Simulation Techniques ..			11
	1.3.1	Introduction	· .......	11
	1.3.2	Numerical Implementation		12
1.4	Interfaces in Process and Device CAD			16
	1.4.1	Introduction	· .........	16
	1.4.2	User-Specified Input and Program Output		16
	1.4.3 Data Transfer from Program To Program			19
	1.4.4	Future Considerations		20
1.5	CMOS Technology ......			21
	1.5.1	Introduction	· ....	21
	1.5.2	Technology Evolution		22
	1.5.3	The Stanford CMOS Process		26
1.6	Summary			32
1.7	Exercises			32
1.8	References .			35

viii
2	Introd uction to SUPREM			37
	2.1	Introduction ...... .		37
	2.2	Ion Implantation . . . . .		43
		2.2.1	Gaussian Profiles .	47
		2.2.2	Pearson IV Profiles.	48
		2.2.3	Multi-layer Implantation.	49
		2.2.4	Boltzmann Transport Analysis (BTA)	50
	2.3	Oxidation . . . . . . . . . . . . . .		53
		2.3.1	Physical Mechanisms ....	53
		2.3.2	Intrinsic Oxidation Kinetics	55
		2.3.3	Pressure Dependence. . . .	58
		2.3.4	Substrate Doping Dependence	60
		2.3.5	Chlorine Ambient	62
		2.3.6	Thin Oxides ..... .	63
	2.4	Impurity Diffusion . . . . . .		65
		2.4.1	Point Defect Kinetics	66
		2.4.2	Concentration Dependent Diffusion.	68
		2.4.3	Dopant Clustering . . . . . . . . . .	73
		2.4.4	Dopant Segregation ........ .	75
		2.4.5	Oxidation Enhanced Diffusion (OED)	76
	2.5	Summary		78
	2.6	Exercises		80
	2.7	References.		82
3	Device CAD			87
	3.1	Introduction.		87
	3.2	Semiconductor Device Analysis		90
		3.2.1	Device Equations ....	90
		3.2.2	User Input for SEDAN.	91
	3.3	Field-Effect Structures .....		98
		3.3.1	Components of Charge.	98
		3.3.2	Charge Build-up ..	102
		3.3.3	Bulk Charge - QB	105
	3.4	Bipolar Junction Structures		109
		3.4.1	Introduction	109
		3.4.2	Bipolar Device Operation - Equilibrium	110
		3.4.3	Non-Equilibrium and the Coupled Equations	112
		3.4.4	Minority Carrier Continuity . . .	116
		3.4.5	Analysis of a pn Junction Diode ...... .	118

					IX
	3.5	Summary			128
	3.6	Exercises			129
	3.7	References.			130
4	PN Junctions				131
	4.1	Introduction.			131
	4.2	Carrier Densities: Equilibrium Case			132
	4.3	Non-Equilibrium .......... .			139
	4.4	Carrier Transport and Conservation			144
	4.5	The pn Junction -		Equilibrium Conditions.	147
	4.6	The pn Junction -		Non-equilibrium.	155
	4.7	SEDAN Analysis . . . . . . . . . . . . .			166
		4.7.1	Heavy Doping Effects ..... .		176
		4.7.2	Analysis of High-Level Injection		181
		4.7.3	Technology-Dependent Device Effects		190
	4.8	Summary			193
	4.9	Exercises			193
	4.10	References.			194
5	MOS Structures				197
	5.1	Introduction ............. .			197
	5.2	The MOS Capacitor ........ .			198
	5.3	Basic MOSFET I-V Characteristics.			208
	5.4	Threshold Voltage in Nonuniform Substrate			217
	5.5	MOS Device Design by Simulation . . . . .			224
		5.5.1	Body-bias Sensitivity of Threshold Voltage		225
		5.5.2	Two-region Model . . . . . . . .		231
		5.5.3	MOSFET Design by Simulation.		234
	5.6	Summary			240
	5.7	Exercises			240
	5.8	References.			242
6	Bipolar Transistors				243
	6.1	Introduction ...			243
	6.2	Lateral pnp Transistor Operation			245
	6.3	Transport Current Analysis ...			252
	6.4	Generalized Charge Storage Model			260
	6.,1)	Transistor Equivalent Circuits.			267
		6.5.1	Charge Control Model ...		267

6.5.2	Small-Signal Equivalent Circuit . . . .	269
6.5.3	ac Modeling of Junction Capacitances	272
6.6 Second	Order Effects. . . . . . . . . . . . . .	274

6.6.1Base-Width Modulation Due to Base-Collector Bias

			- Early Effect . . . . . .	275
		6.6.2	High-Level Injection . . . . .	279
		6.6.3	Series Resistance Effects . . .	282
	6.7	Transit Time and Cutoff Frequency.		282
		6.7.1	Base Transit Time . . . .	282
		6.7.2	Cutoff Frequency . . . . .	286
	6.8	Application of Simulation Tools.		288
	6.9	Summary .		292
	6.10	Exercises		292
	6.11	References.		293
7	BiCMOS Technology			295
	7.1	Introduction............		295
	7.2	Triple-Diffused BiCMOS . . . . .		296
	7.3	Buried-Epitaxial Layer BiCMOS		302
	7.4	Summary .		313
	7.5	Exercises		315
	7.6	References.		316
A	Numerical Analysis			317
	A.1	Introduction. . . . . . . . . . . . . . . . . . . . . .		317
	A.2	Discretization . . . . . . . . . . . . . . . . . . . . .		319
		A.2.1	Time Integration for Initial Value Problems	322
		A.2.2	Space Discretization . . . . . . .	323
	A.3	Newton Method and Convergence Issues		329
	A.4	Device Parameter Computation .		332
	A.5	Summary .		335
	A.6	References. . . . . . . . . . . .		335
B	BiCMOS Technology Overview			337
	B.1	Introduction. . . . . . . . . . . . . . . . . .		337
	B.2	System Needs of the Technology ......		337
	B.3	Overview of the Stanford BiCMOS Process		340
	B.4	Development of BiCMOS Process.		341
	B.5	Electrical Characteristics .....		350

					xi
B.6	References .............		.		353
C Templates for PISCES Simulation					355
C.l	lD BJT ..............		.		356
	C.l.l	BJT Using ASCII Doping Profile ........		.	356
	C.l.2	npn Transistor from Stanford BiCMOS Process .			357
C.2	MaS Capacitors				365
C.3	References .........................			.	369
Index					370

Preface

In the area of modeling of silicon devices it's fair to say that there have been no major revolution in either technology development or teaching methods within the last decade - evolution is the driving force of the IC industry. As a student more than 20 years ago I cut my first "device engineering teeth" on notes which were prepared by a committee of academic and industrial experts who collectively created the first curricula to teach device physics and electronics. Out of those notes have evolved at least two generations of device text books from across the United States and around the world. The areas of MaS and bipolar device physics are well-covered in virtually all of the available texts and there are many of them that include opto-electronic, compound material and heterojunction devices as well. Moreover, there is a growing literature in the area of advanced device physics and especially for quantum devices. Hence, when we undertook the task of writing this book we had no illusions of making a fundamental breakthrough in the classical text book sense. However, this book does present a new conceptual framework for teaching technology and device design. It allows the student and teacher to actively participate in the learning process by doing things in a new way - "hands-on" learning by means of simulation. In the following I will briefly mention how the teaching techniques are different and to suggest ways to incorporate this approach into existing curricula.

For those of you familiar with circuit analysis and design, the SPICE program is a household word and an essential tool. Over the last decade there indeed has been a revolution in the availability and use of SPICE in teaching electronic circuits. Nonlinear device effects are embedded in the device models, yet students can quickly use SPICE to solve not only dc bias problems but ac small-signal and transient problems for complex and realistic circuits. Over the last decade, there has been steady progress in development and wide acceptance of CAD programs

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