Книги2 / 1988 Kit Man Cham, Soo-Young Oh, John L. Moll, Keunmyung Lee, Paul Vande Voorde, Daeje Chin (auth.) Computer-Aided Design and VLSI Device Development 1988

Poisson equation is discretized and solved by Stone's method [3.10] for the potential with the fixed electron quasi-Fermi potential. Then, the electron continuity equation is discretized and solved by SLOR (Successive Line Over Relaxation) for the electron stream function with fixed potential. The electron densities and electron quasi-Fermi potential are calculated from the stream function and are updated. This procedure is repeated until the solutions converge. Finally, the drain current is calculated from the converged stream function.

Mobility Model

In MOS devices, the drain current is directly proportional to the mobility. Because an accurate mobility model is very important for the drain current calculation in the linear and saturation regions, it is presented in detail in this section.

Mobility depends on both the parallel field and the doping density in the bulk silicon. In MOS devices, it also depends on the normal field. The original

V(I,J-1 )

Fig. 3.16. Meshes of potential and stream functions.

350; N is 3 X 1016 em-3 and B is 7.4 x lol V/em; a is 1.54 x 10-5 em/V. This model, however, doesn't agree well with measurements, especially for thin gate oxide and the highly doped channel. In Fig. 3.18, simulations with this model are compared with measurements. The thickness of the gate oxide is

(a)

25 nm and the effective channel length is 0.9 p. m. The drain voltage is 0.1 V in Fig. 3.18(a) and 5 V in Fig. 3.18(b). Disagreement is severe in the saturation region, due to the way the normal field degradation is combined with the bulk mobility model. The normal field not only degrades the zero parallel field mobility but also degrades the saturation velocity. This does not agree with experimental observations.

A new mobility model has been developed. It is based on a modified Gummel's model [3.13] and on a newly characterized normal field mobility [3.14]. The normal and parallel field dependencies are combined in such a

where Vs is 1.036 X 107 em/sec, Vc is 4.9 X 106 cm/sec, G is 8.8. The normal field, En> is in volt/cm. The comparisons of the new model and the measurement are illustrated in Fig. 3.19. Agreement is good in the linear and the saturation regions. CADDET simulations with the new model have been bench-marked for a wide range of device parameters. Agreements are within 10%. CADDET with the new mobility model enables accurate simulation of a wide range of MOS devices with reasonably short computation time. In the next section, the simulation of a conventional MOS device will be illustrated as an example of CADDET applications.

N-channel MOSFET simulation by CADDET

In CADDET, several MOSFET and JFET structures can be simulated such as conventional MOS, DMOS, p-n junction FET, Schottkey-barrier JFET and vertical FET as shown in Fig. 3.14. In this section, the simulation of the conventional MOSFET will be illustrated as a simple case study to show how to use CADDET. Fig. 3.20 shows the structure of the n-channel MOSFET to be simulated. The gate oxide thickness is 46.8 nm and the effective channel length is 1.0 JJm. The junction depth of the source/drain is 0.3 JJm and the substrate doping is 6 x 1014 cm·3•

Before running the program, an input file must be prepared which describes the device structure and doping distribution. The input for the above device is shown in Fig. 3.21. A fixed format input is employed. The problem with this kind of input is that it is easy to make errors and it is difficult to

read and understand. The input consists of 80 column lines. A line is divided into fields. The first line is divided into 5-column fields and the rest is divided into 10-column fields. One feature of CADDET that differs from other device simulators is in the unit system. CADDET uses the MKS system. Device type and other control parameters are specified in the first line. "MOS" in the first field designates the device type as a conventional MOSFET. The second field specifies the number of gates as one. The second line specifies the numbers of x and y grids and their spacings. The third line is the device parameters. Temperature is in the first field as 300 oK, mobility in the second field as 0.06 m2/volt sec, device length in the third field as 3 p. m, channel width in the fourth field as 1 p. m, and the substrate depth in the sixth field as 3 p. m. In the fourth line, the drain biasing schedule is described. The first parameter.gives the back gate bias as -1 volt. In CADDET, the back gate bias is specified as

that is, the source bias with respect to the substrate. Be careful! It is the negative ofthe conventional back gate bias. The second parameter is the starting drain bias. The stepping voltage and the final bias of VDS are specified in the third and fourth fields, respectively. The drain bias is fixed at 0.1 volt in this example. The flatband voltage is in the fifth field. The fifth line is the gate biasing. The initial gate bias is in the first field, the voltage step in the second field, and the final gate bias in the third field In this example, VGS starts from oV and stepped by 0.5 V to 2.0 V. The fourth and fifth parameters specify the gate oxide thickness and gate length, respectively.

The sixth line describes the doping distribution of the source/drain. In CADDET, the source/drain profile can be step, Gaussian or implanted Gaussian. The first parameter in the fifth line gives the doping type as implanted Gaussian. The profile shape and equation in the implanted Gaussian are illustrated in Fig. 3.22. The dose, range, and standard deviation are specified in the second, third and fourth fields respectively. The fifth and sixth parameters specify Ls and LD respectively. The channel profile is in the seventh line. The first parameter is the type of the channel profile. It can be a uniform, a redistributed or an implanted profile. The implanted profile is selected in this case and illustrated in Fig. 3.23. The dose (Np ')' range (Rp ') and standard deviation(u') are in the second, third and fourth fields, respectively. The fifth parameter is the substrate doping (NA ). In the last line, "-1" signals the end of the input. After preparing the input, CADDET can be run either in the interactive or batch mode. When CADDET is run, it first asks for the input

Fig.3.24. Summary file of CADDET.

file name. Then it reads the input file and echoes the input to the terminal. After that, it starts to iterate to solve the Poisson and electron continuity equation. It prints out the results of each iteration. The drain currents and bias conditions are summarized and saved in the summary file as shown in Fig. 3.24.

3.3 PISCES-II: General-Shape 2-D 2-Carrier Device Simulator

PISCES-II is a full 2-D semiconductor device simulation program which has been developed by Stanford University. It solves the Poisson equation and current continuity equations for up to two carriers in two dimensions to simulate the electrical characteristics of devices under either steady-state or transient conditions. The program solves these equations on non-uniform triangular grids so that the device structure can be completely arbitrary with general doping profiles, obtained either from analytical functions or SUPREM-III. The details of the physical models and input syntax are described in PISCES-II user's manual [3.17].

PISCES-II has many applications. It is ideally suited to simulate and study new device structures because it solves all governing equations in the semiconductor with very few approximations. Combined with SUPREM-III, it can be used in the early phases of process and device development to design process experiments and understand device operation and problems. It will reduce the development cost and time. PISCES is also useful to examine the sensitivity of device electrical parameters with respect to the device geometry and process parameters.

In contrast to the limited device operation region and geometry of GEMINI, PISCES-II provides simulations of full-range operation of any homogeneous semiconductor device with arbitrary geometry and doping profile. There are several problems, however. An arbitrary geometry inevitably complicates the grid generation. The inclusion of the current continuity equation brings the possibility of non-convergence. Thus, a user needs some knowledge of optimal grid generation and solution methods to avoid nonconvergence. In the worst Case, the user needs to adjust the grid and experiment with solution methods to solve the convergence problem.

GEMINI has a simple input for the device structure and grid. It seldom has convergence problems because it solves only the Poisson equation. Considering the fact that the device parameters for the typical MOSFET needed by process engineers (threshold voltage(VT), subthreshold slope, leakage current and punchthrough Voltage) can be simulated by GEMINI, it is understandable that many process engineers still prefer GEMINI. However, the progress of