Книги2 / 1988 Kit Man Cham, Soo-Young Oh, John L. Moll, Keunmyung Lee, Paul Vande Voorde, Daeje Chin (auth.) Computer-Aided Design and VLSI Device Development 1988
.pdfDevice Simulation |
83 |
formats.
Fig. 3.7 shows the 2-D plot of the device structure and also the potential profiles with the device biased as defined in the SOLUTION definition. By using the PLPKG program, the bird's eye view of the impurity and potential profiles are plotted and shown in Fig.3.8 and 3.9. The calculated device subthreshold characteristics are plotted in Fig. 3.10. From this graph, the subthreshold slope and threshold voltage (as defined by a threshold current) can be determined.
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DEPLETION |
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Fig.3.7. Device structure and 2-D potential distribution of the example.
The second example briefly shows the results of the SUPRA and GEMINI combination in the channel width simulation. The reader is referred to Chapter 11 for more details of using SUPRA-GEMINI for calculating narrow width effects. Fig. 3.11 shows the input file for the GEMINI program. In this case, the input file is very simple since the structure is essentially defined by the SUPRA data file. The only structure input in this example is the gate definition. The SOLUTION and STEP.VOL definitions are the same as the SUPREM-GEMINI combinations. Fig. 3.12 shows the structure of the device, including the 2-D impurity profile, and also the depletion edge calculated by
84 |
Computer-Aided Design |
lE20
u z o u
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1E16
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..-"- ..-..-"- ..-"-
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--.j,..o"-
Fig.3.8. Bird's-eye-view of impurity distribution.
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Fig.3.9. Bird's-eye-view of potential distribution.
Device Simulation |
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the GEMINI program. One disadvantage in the SUPRA-GEMINI combination is that the grid is defined as in the SUPRA simulation, which is often not optimized for potential calculations. Fig. 3.13 shows the IDs-VGS characteristics of this device simulated by the GEMINI program. This type of channel width simulation is very useful for the development of isolation technologies where the narrow width effects must be minimized.
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= 1.1/-1m |
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--8 |
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= 3V |
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SUBTHRESHOLD |
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Fig.3.10. N-channel MOSFET Subthreshold characteristics simulated by GEMINI.
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Computer-Aided Design |
COMMENT LOCOS ISOLATION CHANNEL WIDTH SIMULATION STRUCTURE DATA.INP-GSW76
ELECTRODE GATE N+POLY WIDTH-O.99 LEFTEDGE-l END
SOLUTION BIAS BIAS
END
Fig. 3.11. GEMINI Input file for the channel width simulation.
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Fig. 3.12. Device structure of channel width simulation.
Device Simulation |
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I
iJ
GEMINI + SUPRA SIMULATIONS
LOCOS ISOLATION
IIT.. = 270,1.
,. = 800 emllY-.
L=1,.m
•WD = 2,....
v. = 0.1V
3 0811 1E13 75K.V
0 NO FIELD IMPlANT
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0.' |
0.• ' |
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2.0 |
V.. CVI
Fig. 3.13. Linear region characteristics for the narrow width devices.
88 |
Computer-Aided Design |
3.2 CADDET: 2-D 1-Carrier Device Simulator
As shown in the previous section, GEMINI can simulate a MOSFET when either VDS is small or either the channel carrier density is so small that the potential distribution is not disturbed as is the case with the subthreshold or weak punchthrough regions. It cannot be used, however, when the channel carrier density is larger than the fixed charge density or when VDS is not small as is the case in most of the triode region and all the saturation region. In order to simulate the whole range of the semiconductor device, Poisson, electron and hole continuity equations should be solved with proper boundary conditions in two dimensions. In a field-effect device, most of the current is carried by the majority carrier of the source/drain. Thus, field-effect devices can be simulated by solving only the majority carrier current continuity equation and Poisson's equation to save calculation time. CADDET is a dedicated program for the field-effect transistor and functions in this way. It can simulate the whole range of the field-effect transistor (subthreshold, linear, saturation and punchthrough) with reasonable CPU time.
CADDET can analyze planar JFET's and MOSFET's with various channel, source, and drain configurations. Fig. 3.14 illustrates the input structures of the field-effect transistors that can be simulated by CADDET. The only limitation is that the silicon and oxide surface must be planar. The device structure is selected by the structure name and the impurity profiles are specified by the step and Gaussian profiles. For these field-effect device structures, the whole range of operation can be simulated and the terminal currents can be calculated without any limitation on bias. CADDET has been linked to the PLPKG program so that the distributions of the electrons, holes, impurities, and potential can be displayed in 1-D, 2-D and 3-D plots. The distribution of the field and velocity can also be plotted. CADDET is widely used to analyze effects of velocity saturation, break-down, hot electron generation, punchthrough, and the Lightly Doped Drain (LDD) structure. An analysis of the LDD structure will be presented in detail in Part B. CADDET is also indispensable for generating the whole I-V characteristics in order to extract SPICE parameters for the circuit simulations.
Device Simulation
111 STANDARD MOSFET IMOSI
121 DOUBLE·DIFUSED MOSFET...
IMOS·DSAI
~-
131 E/D· GATE MOSFET IMOS·EDI
141 DUAL·GATE MOS IMOS·DUGI
G1 |
G2 |
151CHANNEL·DOPED MOSFET MOS (MOS·IISAI
161OFFSET·GATE MOSFET IMOS·OFSGI
89
171DEEP DEPLETION MOSFET IDM.OSI
181PLANAR IPnJFETI IPNJI
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191PLANAR SBJFET ISBJI (Si GoAsl
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PLANAR DUAL GATE SBJFET |
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VFET OR IVJI |
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Fig.3.14. Input structures of CADDET.
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Computer-Aided Design |
There are several limitations in CADDET due to the simplifications. First, only n-channel devices can be simulated because only the electron continuity equation is solved. For p-channel devices, the structure should be converted to the equivalent n-channel device and then simulated. The simulation results are then converted to the p-channel characteristics. Device structures with planar surfaces and Gaussian profiles are approximations of the real device structures. Though CADDET is adequate for many applications, the simplifications of the structure and impurity profile can be a source of inaccuracy in scaled submicron devices, where the effects of the non-planar structure and non-Gaussian profiles are significant. For more details on CADDET, refer to the CADDET manual [3.7].
Basic Equation and Numerical Algorithm
To cover the whole range of the field-effect transistor operation, CADDET solves the Poisson and electron continuity equations. The Poisson equation is
(3.8)
where t/J is the electrostatic potential and e is the dielectric constant; NJj and N;' are ionized donor and acceptor concentrations respectively; n and p are electron and hole concentrations respectively. Although Fermi-Dirac statistics should be used in the semiconductor, Maxwell-Boltzman statistics is employed instead, because it is simple and is still a good approximation. Then the electron and hole densities can be expressed by
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where nj is the intrinsic carrier density; T is the absolute temperature, and k is the Boltzman constant; <Pn and <Pp are the quasi-Fermi potentials of electrons and holes respectively.
Device Simulation |
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The electron continuity equation is formulated using the stream function [3.8] as a basic variable instead of electron and hole concentrations to enhance numerical stability. When the recombination and generation of carriers are neglected, which is reasonable in MOSFETs, the divergence of the electron current density is zero. The electron current density, therefore, can be a curl of some vector (stream function 8). The current density (J) is formulated as below when the normalization [3.9] and Einstein's relation are used.
V·Jn = 0 |
(3.10a) |
In = J.'ne"'V(ne""') |
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I n =10Vx8 |
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For a two-dimensional case, the stream function has only the z component, o. The x andy components of electron current density can be written
(3.lla)
(3.llb)
Divide both sides of the above equations by J.'ne'" , then differentiate the first equation partially with respect to y, the second equation partially with respect to x, and add the two obtaining
! (p~1e~:) + ~(p~1e~:) = 0 |
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This equation is equivalent to the current continuity Eq. (3.10a). After 0 is solved with appropriate boundary conditions, 10 should be evaluated using the following equation based on Eq. (3.lla).
_NbC1 - e-VCS) |
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The integration in the denominator is along the channel. The electron density is calculated using Eqs. (3.lla) and (3.llb) with 10 and o.
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Computer-Aided Design |
Eqs. (3.8) and (3.12) are discretized by the standard 5-point finitedifference approximation. A non-uniform grid is employed to enhance accuracy. The mesh is automatically generated by the program as shown in Fig. 3.15. In the vertical (y) direction, a fine grid is used at the silicon surface and grid spacing increases geometrically toward the substrate. Fine grids are used in the channel and source/drain junctions and coarse grids are used in the middle of the channel in the horizontal (x) direction. The user can specify the total number of grids, the minimum spacing and geometrical ratio for both x and y directions. The maximum number of grid points is limited to 2000. The meshes for potential and for stream function are different and are interleaved as shown in Fig. 3.16. The circle is the node for the potential and the cross is the node for the stream function. The stream function mesh is located in the middle of the potential mesh. To reduce the calculation time, these equations are solved iteratively (Gummel iteration) after discretization instead of by the simultaneous solution of both equations. The flow chart of the program is illustrated in Fig. 3.17. When the program starts, the grid is generated, the potential, hole and electron quasi-Fermi potentials are initialized, and the equations are discretized. The hole quasi-Fermi potential is set constant throughout the device and is the same as that of the substrate. First, the
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Fig.3.1S. Non-uniform rectangular grid in CADDET.
