Книги2 / 1988 Kit Man Cham, Soo-Young Oh, John L. Moll, Keunmyung Lee, Paul Vande Voorde, Daeje Chin (auth.) Computer-Aided Design and VLSI Device Development 1988

COMPUTER-AIDED DESIGN AND VLSI DEVICE DEVELOPMENT

SECOND EDITION

THE KLUWER INTERNATIONAL SERIES

IN ENGINEERING AND COMPUTER SCIENCE

VLSI, COMPUTER ARCHITECTURE AND

DIGITAL SIGNAL PROCESSING

Consulting Editor

Jonathan Allen

Other books in the series:

Logic Minimization Algorithms for VLSI Synthesis. R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. Sangiovanni-Vincentelli. ISBN 0-89838-164-9.

Adaptive Filters: Structures, Algorithms, and Applications, M.L. Honig and D. G. Messerschmitt. ISBN 0-89838-163-0.

Introduction to VLSI Silicon Devices: Physics, Technology and Characterization, B. El-Kareh and R. 1. Bombard. ISBN 0-89838-210-6.

Latchup in CMOS Technology: The Problem and its Cure, R. R. Troutman. ISBN 0-89838-215-7.

Digital CMOS Circuit Design, M. Annaratone. ISBN 0-89838-224-6.

The Bounding Approach to VLSI Circuit Simulation, C. A. Zukowski. ISBN 0-89838-176-2.

Multi-Level Simulation for VLSI Design, D. D. Hill, D. R. Coelho ISBN 0-89838-184-3.

Relaxation Techniques for the Simulation of VLSI Circuits, J. White and A. Sangiovanni-Vincentelli ISBN 0-89838-186-X.

VLSI CAD Tools and Applications, W. Fichtner and M. Morf, Editors ISBN 0-89838-193-2

A VLSI Architecture for Concurrent Data Structures, W. J. Dally ISBN 0-89838-235-1.

Yield Simulation for Integrated Circuits, D. M. H. Walker ISBN 0-89838-244-0.

VLSI Specification, Verification and Synthesis, G. Birtwistle and P. A. Subrahmanyam ISBN 0-89838-246-7.

Fundamentals of Computer-Aided Circuit Simulation, W. J. McCalla ISBN 0-89838-248-3.

Serial Data Computation, S. G. Smith and P. B. Denyer ISBN 0-89838-253-X.

Phonologic Parsing in Speech Recognition, K. W. Church ISBN 0-89838-250-5.

Simulated Annealing for VLSI Design, D. F. Wong, H. W. Leong, C. L. Liu ISBN 0-89838-256-4.

Polycrystalline Silicon for Integrated Circuit Applications, T. Kamins ISBN 0-89838-259-9.

Fet Modeling for Circuit Simulation, D. Divekar ISBN 0-89838-264-5.

VLSI Placement and Global Routing Using Simulated Annealing, Carl Sechen ISBN 0-89838-281-5.

Adaptive Filters and Equalisers, Bernard Mulgrew and Colin F. N. Cowan ISBN 0-89838-285-8.

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Library of Congress Cataloging-In-Publication Data

Computer-aided design and VLSI device development / Kit Man Cham ... let al.l. - 2nd ed. p. cm. - (The Kluwer international series in engineering and computer science: 53. VLSI,

computer architecture, and digital signal processing)

I. Integrated circuits-Very large scale integration-Design and construction-Data processing. 2. Computer-aided design. I. Cham, Kit Man. II. Series: Kluwer international series in engineering and computer science; SECS 53. III. Series: Kluwer international series in engineering and computer science. VLSI, computer architecuture and digital signal processing.

Copyright © 1988 by Kluwer Academic Publishers, Boston. Softcover reprint of the hardcover 2nd edition 1988

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means mechanical, photocopying, recording, or otherwise, without the prior written permission of the publishers, Kluwer Academic Publishers, !OI Philip Drive, Assinippi Park, Norwell, Massachusetts 02061.

CONTENTS

Preface to Second Edition

This second edition incorporates substantial enhancements to the first editon.

This book is concerned with the use of Computer-Aided Design (CAD) in the device and process development of Very Large Scale Integrated Circuits (VLSI). The emphasis is in Metal-Oxide-Semiconductor (MOS) technology. State-of-the-art device and process development are presented.

This book is intended as a reference for engineers involved in VLSI development who have to solve many device and process problems. CAD specialist will also find this book useful since it discusses the organization of simulation system, and also presents many case studies where the user applies the CAD tools in different situations. This book is also intended as a text or reference for graduate students in the field of integrated circuit fabrication. Major areas of device physics and processing are described and illustrated with simulations.

The material in this book is a result of several years of work on the implementation of the simulation system, the refinement of physical models in the simulation programs, and the application of the programs to many cases of device developments. The text began as publications in journals and conference proceedings, as well as lecture notes for an Hewlett-Packard internal CAD course.

This book consists of two parts. It begins with an overview of the status of CAD in VLSI, which points out why CAD is essential in VLSI development. Part A presents the organization of the two-dimensional simulation system. The process, device and parasitics simulation programs and application

examples are presented. These chapters are intended to introduce the reader to the programs. The program structure and models used will be described only briefly. Since these programs are in the public domain (with the exception of the parasitic simulation programs), the reader is referred to the manuals for more details. In this second edition, the process program SUPREM III has been added to Chapter 2. The device simulation program PISCES has replaced the program SIFCOD in Chapter 3. A three-dimensional parasitics simulator FCAP3 has been added to Chapter 4. It is clear that these programs or other programs with similar capabilities will be indispensible for VLSI/ULSI device developments.

Part B of the book presents case studies, where the application of simulation tools to solve VLSI device design problems is described in detail. The physics of the problems are illustrated with the aid of numerical simulations. Solutions to these problems are presented. Issues in state-of-the-art device development such as drain-induced barrier lowering, trench isolation, hot electron effects, device scaling and interconnect parasitics are discussed. In this second edition, two new chapters are added. Chapter 6 presents the methodology and significance of benchmarking simulation programs, in this case the SUPREM III program. Chapter 13 describes a systematic approach to investigate the sensitivity of device characteristics to process variations, as well as the trade-otIs between different device designs. Materials on the simulation of parasitic capacitance and resistance (originially Chapter 13 in the first edition) now include both two-dimensional and three dimensional simulations, and are presented in Chapter 15.

Part B is organized as follows. Chapters 5 and 6 describes the basic methodology in process and device simulations. Chapters 7 to 11 discuss the issues in VLSI device development. After understanding these issues, the readers will be ready to consider device designs, which are described in Chapters 12 to 14. Chapter 15 shows examples of parasitics extractions.

For the book to be used as a textbook, we recommend that it be used for a semester course. If the course deals with device modeling and computeraided design tools, then Part A of the book should be emphasized. The student will learn about the fundamentals of process and device simulation programs and simulation system organization. If the course deals with device

Preface xi

physics and process development, then Part B of the book should be emphasized. The student will learn about current issues in VLSI device development. In either case, Part A and Part B of the book will compliment each other.

A note about the symbols used in this book. The symbols used in different simulation programs are often not consistent with each other. Therefore, the reader may find that symbols in this book not standardized throughout the chapters. We appologize for this confusion.

We are grateful that Dr. John Chi-Hung Hui has contributed Chapter 9 on the issue of hot electron degradation effects in submicron n-channel MOSFETs. The optimization of the LDD structure for reducing the hot electron degradation is described in detail.

We are also grateful that Dr. Sukgi Choi has contributed Chapter 14 on the issue of device scaling. The scaling of n-channe1 enhancement and depletion mode devices are presented. Factors causing the device characteristics to deviate from classical scaling rules, as well as complications involved in short channel device scaling such as punchthrough are discussed.

We are indebted to Dr. D. Wenocur and Mr. M. Varon for proof reading the manuscripts for the first edition. Mr. K. Okasaki has been assisting us with the computer systems which produced many of the figures in this book, as well as the camera-ready manuscript. He is also reponsible for debugging and modifying the simulation programs. Thanks are to Mr. T. Ekstedt who has kindly assisted the formatting of the first edition, and Dr. S.-L. Ng who has assisted in preparing many of the figures.

We are indebted to many of our colleagues at Hewlett-Packard Laboratories for providing us with many ideas and suggestions, and to our management for providing an opportunity for us to complete this task.

Finally, we like to thank our families for their spiritUal support, patience and understanding during the preparation of the manuscript.