Allen and Holberg - CMOS Analog Circuit Design |
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Page X.10-8 |
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First Order ∑Δ Modulator-Cont’d |
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The noise power in the signal band is |
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fB |
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fB |
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n2 = |
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2df = |
⌠ |
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ωτ 2 |
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⌠ N(f) |
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df |
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2e |
rms |
2τ sin |
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⌡ |
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fB |
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2 |
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⌠ |
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2 |
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no |
= ⌡ 2erms |
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2τ (πfτ) |
df |
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0 |
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where sin |
ωτ |
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2πf = sin |
πf |
≈ πfτ |
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= sin |
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2 |
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2fS |
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fS |
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Therefore, |
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if fS >> f |
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fB |
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2 |
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3 |
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2 |
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2 |
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2 |
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e2 |
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π2(2τf |
B |
)3 |
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n |
≈ (2τ) |
π |
e |
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rms |
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rms |
⌡f |
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df = |
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3 |
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Thus, |
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where , |
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fS >> fB |
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π 2f τ 3/2 |
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π M-3/2 |
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n |
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= e |
rms |
= e |
rms |
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3 |
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B |
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3 |
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Each doubling of the oversampling ratio reduces the modulation noise by 9 dB and increase the resolution by 1.5 bits.
Allen and Holberg - CMOS Analog Circuit Design Page X.10-9
Oversampling Ratio Required for a First-Order ΔΣ Modulator
A block diagram for a first-order, sigma-delta modulator is shown in the z-domain. Find the magnitude of the output spectral noise with VIN(z) = 0 and determine the bandwidth of a 10-bit analog-to-digital
converter if the sampling frequency, fS, |
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12 |
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= rms value of |
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is 10 MHz. |
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quantization |
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noise |
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+ |
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Solution |
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Vin (z) + |
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+ |
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Vout(z) |
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1 |
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Σ |
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1 |
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Σ |
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z-1 |
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Vout(z) = erms + z-1 |
[Vin(z) - |
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- |
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Vout(z)] |
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or |
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z-1 |
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V |
out |
(z) = |
e |
rms |
if V |
in |
(z) = 0 → |
V |
out |
(z) = (1-z-1)e |
rms |
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z |
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-jωτ |
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ωτ |
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= 2 |
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2 |
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ωτ |
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|N(f)| = E(f) 1 - e |
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= 2E(f) sin |
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fS |
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erms sin |
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2 |
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2 |
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The noise power is found as |
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fB |
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fB |
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⌠ |
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2 |
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2πfτ |
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n |
2 |
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⌠ |
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df = |
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2 |
e |
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df |
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(f) = ⌡|N(f)| |
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2 |
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fS |
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sin2 |
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rms |
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⌡ |
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2πfτ |
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0 |
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Let sin 2 |
≈ πfτ if fS >> fB. Therefore, |
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2 |
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fB |
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8π2 |
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n |
(f) = 4 |
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⌠ |
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o |
fS |
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(πτ)2 ⌡f2 |
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or |
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rms |
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3 |
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rms |
fS |
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fB3/2 |
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no(f) = |
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≤ |
VREF |
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3 |
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π·erms |
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210 |
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fS |
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Solving for fB/fS gives (using |
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in erms term is equal to VREF) |
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fB |
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12 |
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= [0.659x10-3]2/3 = 0.007576 |
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fS |
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π 210 |
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fB = 0.007576·10MHz = 75.76kHz.
Allen and Holberg - CMOS Analog Circuit Design |
Page X.10-10 |
Decimator (down-sampling)
The one-bit output from the ∑Δ modulator is at very high frequency, so we need a
decimator (or down sampler) to reduce the frequency before going to the digital filter.
fS |
fD |
analog |
f |
B |
∑Δ |
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DECIMATOR |
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LOW-PASS |
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2fB |
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input |
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MODULATOR |
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FILTER |
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digital |
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PCM |
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Removes the |
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Removes the |
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modulation noise |
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out-of-band |
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components |
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of the signal |
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from modulator |
to low-pass filter |
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xn |
yn |
REGISTER
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fS |
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yn = |
1 |
N |
fS |
N |
∑ xn , where N = |
= down-sampling ratio |
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fD |
N=0
The transfer function of decimator is
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Y(z) |
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1 |
N-1 |
1 1 - z-N |
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H(z) = |
X(z) |
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N |
∑ z-i = N |
-1 |
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i=0 |
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1 - z |
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H(ejωτ) = sinc(πfNτ) sinc(πfτ)
(dB) 
Allen and Holberg - CMOS Analog Circuit Design |
Page X.10-14 |
System block in time domain and frequency domain |
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2 |
digital |
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Bf |
PCM |
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Frequency |
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D |
LOW-PASS |
FILTER |
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f |
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DECIMATOR |
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Frequency |
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Time |
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∑Δ |
MODULATOR |
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fB |
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analog |
input |
Time |
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Frequency |
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E(f) 1 
Allen and Holberg - CMOS Analog Circuit Design |
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Page X.10-16 |
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Second-Order ∑Δ ModulatorCond’d |
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The noise power in the signal band is |
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no = erms |
π2 |
M-5/2 = |
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π2 |
Δπ |
( M) |
-5/2 , fs >> fo |
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12 |
M-5/2 = |
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15 |
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5 |
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Each doubling of the oversampling ratio reduces the modulation noise by 15 dB and increase the resolution by 2.5 bits.
Higher-Order Σ− Modulators
Let L = the number of loops. The spectral density of the modulation can be written
as |
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L |
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N |
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(f) |
= e |
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L |
rms |
2τ 2sin ωτ |
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2 |
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The rms noise in the signal band is given approximately by |
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n |
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≈ e |
rms |
πL |
(2f |
B |
τ) L+0.5 |
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2L+1 |
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This noise falls 3(2L+1) dB for every doubling of the sampling rate providing L+0.5 extra bits.
Decimation Filter |
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sinc(πfNτ) L+1 |
is close to being optimum for decimating the |
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A filter function of |
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sinc(πfτ) |
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signal from an Lth-order −Σ modulator. Stability
For orders greater than 2, the loop can become unstable. Loop configuration must be used that provide stability for order greater than two.
Allen and Holberg - CMOS Analog Circuit Design |
Page X.10-17 |
The modulation noise spectral density of a second-order, 1-bit ΔΣ modulator is given as
4 |
2 |
ωt |
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|N(f)| = |
fs |
sin2 |
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4 |
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where is the signal level out of the 1-bit quantizer and fs = (1/τ) = the
sampling frequency and is 10MHz. Find the signal bandwidth, fB, in Hz if the modulator is to be used in an 18 bit oversampled ADC. Be sure to state any assumption you use in working this problem.