Allen and Holberg - CMOS Analog Circuit Design
Dynamically Biased Inverter
VDD
CB |
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M2 |
φ2 |
iD |
φ2 |
vOUT
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φ1 |
COS |
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+ |
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M1 |
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vIN |
φ2 |
VSS |
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During phase 2 the offset and bias of the inverter is sampled and applied to COS and CB.
During phase 1 COS is connected in series with the input and provides offset cancelling plus bias for M1. CB provides the bias for M2.
Allen and Holberg - CMOS Analog Circuit Design
Dynamic, Push-pull, Cascode Op Amp
Simplified schematic -
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VDD |
+ |
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VB2 |
φ1 |
φ2 |
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M4 |
M8 |
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VDD M7 
M3 VDD
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φ2 |
C2 |
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IB |
φ1 |
vOUT |
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+ |
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vIN |
vIN |
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C1 |
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M6 |
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M2 |
VSS |
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VSS |
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φ1 |
φ2 |
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M5 |
+ |
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M1 |
VB1
-
VSS
Allen and Holberg - CMOS Analog Circuit Design
Dynamic, Push-pull, Cascode Op Amp - Cont'd
Phase 1 Clock Period
VDD
M8
M7
VDD |
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+ |
VDD - VB2 - vIN+ |
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C2 |
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vIN+ |
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IB |
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C1 |
v+IN - VSS - VB1
VSS 
M6
M5
VSS
Phase 2 Clock Period
VDD
v-IN - v+IN + 
VDD - VB2 
M4
M3
VDD
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+ |
VDD - VB2 - vIN+ |
- C2 |
vIN- |
vOUT |
v+IN - VSS - VB1 
C1
M2
VSS
v-IN - v+IN + 
VSS + VB1 
M1
VSS
Allen and Holberg - CMOS Analog Circuit Design
A Dynamic Op Amp which Operates on Both Clock Phases
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VDD |
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φ2 |
φ1 |
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M8 |
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φ1 |
φ2 |
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M4 |
V |
M7 |
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M3 V |
DD |
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DD |
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C2 |
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C4 |
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φ1 |
φ2 |
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RB |
vIN- |
φ2 |
φ1 |
vIN+ |
vOUT |
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C1 |
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C3 |
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M6 |
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M2 |
VSS |
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VSS |
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φ2 φ1
M5 |
φ1 |
φ2 |
M1 |
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VSS
1.6 mW dissipation Settling time = 10 ns into 5 pF
GB ≈ 130 MHz with CL = 2.2 pF 1.5 m technology
Used with a 28.6 MHz clock to realize a 5th order switched capacitor filter with a cutoff frequency of 3.5 MHz.
Allen and Holberg - CMOS Analog Circuit Design |
Page X.0-1 |
X. CMOS DATA CONVERTERS
Contents
X.1 Characterization and definition of D/A converters
X.2 Voltage scaling D/A converters
X.3 Charge scaling D/A converters
X.4 Voltage and charge scaling D/A converters
X.5 Other types of D/A converters,
X.6 Characterization and definition of A/D converters
X.7 Serial A/D converters
X.8 Medium-speed A/D converters
X.9 High-speed A/D converters (Flash, two-step, multiple pipe) X.10 Oversampled A/D converters
X.11 Examples of A/D converters, limits of A/D converters
Organization
Chapter 10
D/A and A/D
Chapter 11
Converters
Analog Systems
SYSTEMS |
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Chapter 7 |
Chapter 8 |
Chapter 9 |
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CMOS |
Simple CMOS |
High Performance |
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Comparators |
OTA's |
OTA's |
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COMPLEX |
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CIRCUITS |
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Chapter 5 |
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Chapter 6 |
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CMOS |
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CMOS |
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Subcircuits |
Amplifiers |
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SIMPLE |
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Chapter 2 |
Chapter 3 |
Chapter 4 Device |
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CMOS |
CMOS Device |
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Characterization |
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Technology |
Modeling |
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DEVICES |
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Transmission links Magnetic tape recorders Computer memories Paper tape recorders Real-time processor Comparators
Etc.
Magnetic tape recorders Computer memories
Allen and Holberg - CMOS Analog Circuit Design |
Page X.1-1 |
X.1 - CHARACTERIZATION AND DEFINITION OF CONVERTERS
General Concept of Digital-to-Analog (D/A) Converters
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Reference |
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b0 |
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b1 |
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b2 |
Digital-to- |
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b3 |
Analog |
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vOUT or iOUT |
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Converter |
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bN-1 |
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vOUT = KVrefD |
or iOUT = KIrefD |
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where
K = gain constant (independent of digital input)
b0 |
b1 |
b2 |
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bN - 1 |
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D = 2N |
+ 2N-1 |
+ 2N-2 |
+ ···· + |
21 |
= scaling factor |
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Vref (Iref) = voltage (current) reference |
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bN-1 = most significant bit (MSB) |
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b0 = least significant bit (LSB) |
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For example, |
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b0 |
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b1 |
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b2 |
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b N - 1 |
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+ |
2N-1 + |
2N-2 + ···· + |
21 |
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vOUT = KVref 2N |
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N-1 |
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= KV |
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∑ b |
2j |
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ref 2N |
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j=0
Allen and Holberg - CMOS Analog Circuit Design |
Page X.1-2 |
Basic Architecture of a D/A Converter
Continuous Time D/A Converter-
Voltage |
Vref |
Scaling |
DVref |
Output |
v |
OUT |
= KDV |
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ref |
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References |
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Network |
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Amplifier |
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Binary Switches
b0 b1 b2 |
bN-1 |
Clocked D/A Converter-
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Vref |
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b0 |
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b1 |
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b2 |
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Digital |
Vout |
Sample V* |
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to |
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Latch |
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and |
out |
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analog |
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hold |
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converter |
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bN-1 |
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Clock |
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Allen and Holberg - CMOS Analog Circuit Design |
Page X.1-3 |
Classification of D/A Converters
Done by how the converter is scaled-
D/A Converters
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Serial |
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Parallel |
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Charge |
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Voltage |
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Charge |
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Current |
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Voltage and Charge
Slow |
Fast |