Статьи на перевод PVDF_P(VDF-TrFE) / Ferroelectric copolymer P(VDF-TrFE) as gate dielectric in organic field effect transistors for memory application devices

Abstract—Fabrication of ferroelectric memory field effect transistor (FEMFET) is presented with copolymer P(VDF-TrFE) as gate dielectric. Spin-coated copolymer film has semicrystalline structure after annealing, in which the crystallites contains ferroelectric and paraelectric phase. Dipolar alignment in ferroelectric phase is controlled with the sweeping of transistor gate bias. Ferroelectric remanent polarization enables current retention in the transistor during OFF state that can be used in non-volatile memory application.

Index Terms— FEMFET, ferroelectric polymer, P(VDFTRFE).

I. INTRODUCTION

Polyvinylidene fluoride (PVDF) and later its copolymer have been intensively studied to substitute ferroelectric ceramics for application in non-volatile memory especially in complete organic electronic devices [1]. Ferroelectric polymers e.g. PVDF, its copolymer with trifluoroethylene P(VDF-TrFE), and odd Nylon (Nylon-11) possess semicrystalline structure which both ferroelectric and paraelectric phases exist in the crystallites. Polarization dipoles in these polymers are resulted from the difference in electronegativity of atoms (fluoride and hydrogen for PVDF and copolymer) or chemical groups (amine and carboxylic acid for odd Nylon) and the atom/molecule bonding order along the molecular chains. Recently Schroeder et al has reported the application of ferroelectric-like amorphous poly(m-xylylenediamine-alt- adipic acid) (MXD6) for organic FET which exhibits retention of current that can be used for memory devices [2]. Nevertheless the mechanism of the ferroelectric-like behavior is still unclear.

In this paper, we illustrate the long current retention in a ferroelectric memory field effect transistor (FEMFET) using copolymer P(VDF-TrFE) as gate dielectric and explain the current retention mechanism based on the operation of a FET

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in accumulation mode together with the polarization hysteresis of the ferroelectric copolymer.

II. EXPERIMENTAL

Indium doped tin oxide (ITO) glass slides were cleaned by standard process (acetone, methanol, deionized water) in ultrasonic bath and blown dry with Nitrogen gas. Copolymer P(VDF-TrFE) of 57-43 mol% was used as purchased without further purification and dissolved in Methyl Ethyl Ketone with the help of magnetic stirring. The solution was then filtered with pore size of 0.45 ȝm and subsequently spin-coated onto the ITO substrates to form a 0.9 ȝm thick film. The samples were annealed in Nitrogen ambient at 140oC for 2 hours to enhance the film crystallinity [3] and adhesion to the ITO surface. Circular gold electrodes of 1.5 mm diameter were deposited by thermal evaporation onto the film to form metal- insulator-metal (MIM) capacitors. Hysteric polarization was measured from the MIM device by using a Radiant ferroelectric tester HVS6000. Pentacene (Sigma Aldrich) was purified by temperature gradient sublimation in vacuum at 10-3 torr and then deposited by thermal evaporation onto the copolymer film. Pentacene evaporation was at 5×10-5 Pa vacuum and rate of 0.1-0.2 Å/s to deposit 80nm thick film. Pure gold (99.99%) was evaporated in 9×10-5 Pa vacuum through shadow mask to form top contacts for source and drain. Electrical measurement of transistors was done with two connected Keithley 2400 Sourcemeter units to apply drain and gate voltage and measure drain and gate leakage current in N2 ambient of glove-box.

III. RESULTS AND DISCUSSION

Investigation by X-ray diffraction shows large amount of amorphous phase (dash line in Fig. 1) formed in the copolymer film deposited on ITO. Formation of the amorphous phase is likely due to the surface roughness of ITO substrate and fast evaporation of MEK solvent (boiling point at 80oC) during spin-coating. Inset (a) of Fig. 1 reveals the co-

Fig. 1. XRD data of P(VDF-TrFE) thin film on ITO substrate after annealing at 140oC for 2 hours. Dash line indicates diffracted intensity from the amorphous phase. Inset (a) shows the peaks in the range 17-21o. Inset (b) shows spectra of bare ITO substrate.

Fig. 2. Surface morphology of P(VDF-TrFE) copolymer thin film (Scale: 2×2 ȝm, Rrms = 15 nm)

existence of both ferroelectric and paraelectric phase in crystalline phase which is observed by the two peaks at around 20o. The first peak is resulted by diffraction from of paraelectric (Į) phase (<110> planes) while the next one is from ferroelectric (ȕ) phase (<200> planes) [4]. The other two peaks originated from the ITO substrate (30.5o and 35.4o). From its higher intensity, the paraelectric phase is found to grow into larger crystalline size compared to the ferroelectric counterpart. This is probably due to the more stably energetic state of the trans-gauche bond in comparison to the all trans bond [5].

Topography examination of the thin film by Atomic Force Microscopy (AFM) shows a structure of randomly oriented rod-like grains (Fig. 2). The roughness value Rms of the thin film is found to be 15 nm. The mobility of the transistor device is found to be 0.05 cm2/Vs in this experiment that is one order higher than value reported in [6] for the same device configuration (bottom gate) and physical dimensions. This implies a better interface formation between P(VDF-TrFE) and pentacene together with the slow deposition that enhances crystalline growth in terms of pentacene grain size and hence improves the transportation of charges carrier through the thin layer of the semiconductor near the interface.

Polarization hysteresis data of the ferroelectric copolymer are presented in Fig. 3 (the device configuration is shown in the inset). Polarization data are obtained with different drive voltages. Polarization saturation was obtained at 105V, corresponding to values of |6| ȝC/cm2 for remanent polarization and |80| MV/m for coercive fields. From the P-E graph, a large departure of remnant polarization (PR) from the spontaneous polarization (PS) values (PR<PS) is observed, which causes the non-square shape of the P-E curve. This is due to the reversible polarization that exists concurrently with the irreversible polarization from the ferroelectricity [7]. As polarization reversal occurs, both reversible and irreversible

currents are simultaneously measured. However, when the applied DC voltage decreases to zero from saturation, only the reversible current is obtained, and it is similar to discharging current in dielectric capacitors. The irreversible current, which is caused by the dipolar moment, does not appear during this time because the applied voltage is still at the same polarity and with diminishing magnitude; hence no dipole-switching occurs. As indicated by the XRD data the film comprises of both crystalline and amorphous phase, the reversible polarization (current) is probably resulted from the amorphous phase, which will charge up and discharge when the applied DC voltage increases and decreases to zero, respectively. This is important especially to the operation of an FEMFET device, as the semiconducting layer is in direct contact to the insulating layer. The dielectric behavior of the reversible polarization in the copolymer film has certain effects on the semiconductor layer of pentacene. Therefore, it affects the memory retention behavior of the devices as being discussed below.

Fig. 3. Polarization hysteresis of copolymer P(VDF-TrFE) thin film of 0.9 ȝm thickness. The inset shows the tested device structure.

180

Fig. 4. An FEMFET device (a) Structure of bottom-gate FEMFET,

(b) ID-VD, (c) ID-VG

A bottom-gate FEMFET device structure is shown in Fig. 4(a) with its electrical data ID-VD and ID-VG (Fig. 4(b) and (c), respectively). The device is observed to operate in normal accumulation mode of a PMOS transistor. This reflects the p- type characteristics of semiconducting pentacene, in which holes are the hopping charge carriers. The copolymer layer is also seen to operate as excellent gate dielectric layer. The mobility of the device is determined in the saturated regime of drain current for each gate bias, following the equation:

The capacitance CFE of the dielectric layer is calculated using a dielectric constant İ = 13. Fig. 4(c) shows a strong hysteresis in the transfer characteristic of the transistor, as a sweeping DC voltage is applied from +20V to -40V and back. By subjecting the gate to positive voltage sweeping (+20V to

0V), the transistor is effectively turned off due to p-type semiconducting characteristic of pentacene. At the same time, positive voltage also orients the dipoles to upward direction, or pointing away from the bottom-gate. As voltage polarity switches at 0V to negative values, the accumulation mode takes place in the pentacene layer as well as the reversing of dipoles in the P(VDF-TrFE) layer to downward direction (towards the bottom-gate). When gate voltage reaches -40V, most of the dipolar domains with local coercive field EC less than 40V are switched to downward direction. As the bias is reversed in the second half cycle, the dipoles are undisturbed since the voltage polarity is not changed (from -40V to 0V). However the apparent field at the gate actually is higher because it consists of the field of the applied DC voltage and the electric field resulted from the dipolar direction. As a result, the measured drain current (ID) is much higher than the one collected during the first half. A difference of 2 orders in current amplitude can be obtained at zero gate voltage as shown in Fig. 4(c). This difference is useful for the application in non-volatile memory devices that can be represented as ON (“1”) and OFF (“0”) states. By applying the suitable gate voltages, the possible mechanism (including operation if “write”, “read” and “erase” of data) of nonvolatile memory can be suggested as followed. “Write” is defined as the application of suitable negative voltage at the gate to orienting the polarization domains that is equivalent to storing of the signal. By removing the gate bias while keeping a drain voltage, the signal is “read” out from the current retention by the dipoles. If a reversed voltage is supplied to the gate, the signal will be “erased” because of the dipolar disorientation and reversed direction that diminished the current retention. These cycles can be repeated over time due to the stable polarization switching process as well as the chemical stability of ferroelectric copolymer.

One may see that during the operation of the transistor described in Fig. 4(c), the gate bias has not reached the coercive field EC of the devices, which is |80| MV/m or |70| V as determined from the P-E curve. This also indicates the remnant polarization obtained during the measurement is less than |2| ȝC/cm2. Due to the “dielectric behavior” of the amorphous phase, the operating mechanism of the device possibly becomes more complicated due to the simultaneous occurrence of reversible and irreversible polarization mechanisms. Each of these mechanisms needs to be isolated and interpreted in order to fully understand the memory process and capability of the device. An analysis in details of the interaction between the reversible and irreversible polarization during the operation of FEMFET device is reported elsewhere [8].

For this study, to fully understand the effect of the irreversible polarization which is resulted from the dipolar orientation, the gate voltage is applied up to the saturation range as shown in Fig. 5. The gate bias is swept from +100V to -100V and back to +100V, with a same drain voltage of -

Fig. 5. Transfer characteristic of transistor as gate voltage is swept from +100V to -100V and reversed direction.

30V. As a voltage of +100V is applied, the current ID shows a sudden drop and follows a more gradual manner when the gate bias decreases. Since the applied voltage of +100V is much higher than the coercive field (|70|V), all of the dipoles are oriented corresponding to the gate field direction. This also causes a sudden charging in the amorphous phase of the copolymer layer. However this effect only takes place in a very short time at the beginning. As more dipolar domains are reoriented corresponding to the field direction, the amorphous phase discharges (fast current drop) and charges up to the new direction of the field (slow decrease of current due to increment in the inversion of pentacene layer). One interesting point to be noted is that the onset of current saturation is slightly above -70V. This implies that as the field acting on the copolymer film approaches the coercive value, the maximum accumulation is simultaneously reached in the pentacene layer. This result is reasonable since after applied voltage exceeds the coercive value, the polarization in the ferroelectric field is fast reaching the saturation polarization value which is the maximum charge that a ferroelectric film can “hold” as shown in Fig. 3. The saturation polarization, as mentioned above, consists of both reversible and irreversible polarization. Therefore, in the second sweeping (voltage increases from -100V), as discharging starts to occur in the amorphous, lower current is obtained at zero voltage and steeply drops after the gate voltage switches to positive polarity.

IV. CONCLUSION

In this paper, an organic field effect transistor was fabricated with the employment of ferroelectric copolymer of P(VDF-TrFE) as gate dielectric. Analysis of electrical data of the FEMFET reveals important influences of the reversible and irreversible polarization in the copolymer dielectric layer to the device operation. The appearance of both ferroelectric crystalline phase with dipolar polarization and its amorphous counterpart with dielectric behaviors strongly affect the current retention performance. While the irreversible

polarization provides the capability for current retention, the dielectric charging /discharging behavior causes some deviation to this retention. The deviation is shown by the instability of current as gate bias is applied or switches the polarity. The memory retention characteristic is recognized through the current retention during the OFF state of the transistor which results from the corresponding orientation of the dipolar polarization in the dielectric film. “Read”, “write”, and “erase” operation can be obtained through the manipulation of gate voltage to attain ON/OFF state of the transistor. Based on the performance of the device and the stability in properties of P(VDF-TrFE), the copolymer shows some promising capabilities for the application in non-volatile memory at more effective processing costs.

ACKNOWLEDGMENT

The authors would like to acknowledge the Polymer electronics research group at School of Materials Science and Engineering, Nanyang Technological University (Singapore).

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