Статьи на перевод PVDF_P(VDF-TrFE) / Fabrication of Vertically Well-Aligned P(VDF-TrFE) Nanorod Arrays
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Fabrication of Vertically Well-Aligned P(VDF-TrFE) Nanorod
Arrays
Sehoon Oh, Yeontae Kim, Yoon-Young Choi, Dongjin Kim, Hyunwoo Choi, and Kwangsoo No*
The importance of ferroelectric polymers has recently been recognized on the basis of their diverse applications, for example, in organic electronics, sensors, energy storage, nonvolatile memory, pyroelectric devices, and thin film transistors.[1–10] During the past decade there have been numerous studies on the fabrication of polymers with one-dimensional nanostructures such as nanotubes and nanowires, with an increasing demand for miniaturization of electronic devices, but there have been no reports on the realization of well-aligned, one-dimensional structures with ferroelectric polymers.[11–14] The formation of a polymer nanostructure with a high aspect ratio is expected to be difficult due to the low stiffness and softness of the polymers. There are two main streams of nanostructure fabrication methods for ferroelectric polymers: template assisted methods[15–17] and imprint methods using a mold.[18,19] Anodic aluminum oxide (AAO) templates have been widely used for producing polymer nanostructures in template assisted methods. However, the AAO template has several limitations including difficulty in large area fabrication, and scalability and uniformity of the hole specifications. Problems of entanglement and leaning of the nanostructure when the template is removed are inevitable in the AAO template assisted methods due to the extreme aspect ratio. In the case of imprinting of the mold, it is difficult both to fabricate the nanostructure, because of the extremely high surface area, and to obtain nanostructures with high aspect ratio. Processes such as the introduction of a self-assembled monolayer (SAM) and plasma treatment are therefore required to detach the polymer nanostructure from the mold.[18,19]
Among the ferroelectric polymer materials, poly(vinylidene fluoride–trifluoroethylene) [P(VDF–TrFE)] has a good property in that it naturally has a stable ferroelectric β-phase at room temperature without additional processes such as mechanical stretching or electrical poling.[20,21] P(VDF–TrFE) copolymer has a structure in which the small crystallites are surrounded by amorphous regions. Since the crystallinity is of significant importance to the enhancement of the ferroelectric properties with a large remnant polarization and shorter switching time, the crystallization of P(VDF–TrFE) is a very critical factor for potential applications. Herein, we report for the first time,
S. Oh, Y. Kim, Y.-Y. Choi, D. Kim, H. Choi, Prof. K. No Department of Materials Science and Engineering Korea Advanced Institute of Science
and Technology(KAIST)
Daejeon 305-701, Korea E-mail: ksno@kaist.ac.kr
DOI: 10.1002/adma.201201940
vertically well-aligned P(VDF–TrFE) nanorods with high aspect ratios obtained using a simple and convenient immersion crystallization method.
It is difficult to fabricate a one-dimensional nanostructure by traditional template assisted methods and we have accordingly conducted many trials to obtain vertically aligned P(VDF–TrFE) nanorod structures. SiO2 templates prepared by a semiconductor fabrication process were used in the formation of the P(VDF– TrFE) nanorod arrays. Compared to the AAO templates, the SiO2 templates offer several advantages such as scalability, compatibility with the semiconductor process, and capability of nanoscale device fabrication. However, unlike the AAO templates, since the bottom side of the SiO2 templates is blocked by Si, infiltration of P(VDF– TrFE) solution can be inhibited due to air in the holes. Initially, in order to optimize the experimental conditions, we examined the effects of processing parameters, such as the drying and annealing conditions, on the template patterns. Figure 1 shows the overall schematic process diagram and the process development of the nanostructure fabrication in our study. Figure 1a shows a schematic view of a SiO2 template fabricated by photolithography and etching processes. The holes in the SiO2 template have a diameter and a depth of ≈120 nm and ≈1.2 μm, respectively. 15 wt% P(VDF– TrFE) solution was dropped on the SiO2 template and infiltrated into the holes under ambient conditions for 10 min (Figure 1b). Figures 1c–e represents the developmental order of the fabrication process of the nanorod arrays we attempted to form; Figure 1e provides details of the most developed and optimized fabrication process. Figure 1c shows the conventional method, in which the sample was dried at 90 °C for 1 h and annealed at 130 °C for 16 h on a hot plate under ambient conditions, followed by removal of the SiO2 template by 30 wt% KOH solution at 40 °C on the hot plate. The sample was soaked until completely detached from the template. Figure 1d presents details of the process in which the sample was dried at room temperature for 1 h and annealed at 130 °C for 16 h under vacuum conditions. Template removal process was conducted identically to that shown in Figure 1c. More than 4 h was required to separate the nanorod sample from the template in both cases. In Figure 1e, details are provided of what we call the immersion crystallization (IC) method. The sample was immersed in hot etching solution at 100 °C for 1 h to remove the SiO2 template and polymer crystallization was then induced after drying under vacuum conditions for 16 h. Subsequently, detached samples were cleaned with deionized water and dried in a vacuum oven at room temperature for 16 h.
Figure 1f provides a schematic image of the P(VDF–TrFE) nanorod arrays fabricated by the three different processes (Figures 1c,e) (see Experimental Section for detailed descriptions of the processes).
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Rinsing and drying
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Figure 1. Schematic process diagram and process development of nanostructure fabrication. a) SiO2 template fabricated by photolithography and etching in the semiconductor process hole size: diameter ≈120 nm, depth ≈1.2 μm, and spacing ≈60 nm). b) Infiltration of the P(VDF–TrFE) solution into the SiO2 template. Process flows for crystallization: c) under ambient conditions, d) under vacuum conditions, and e) by the immersion process. f) Schematic diagram of the fabricated P(VDF–TrFE) nanorod arrays.
Figure 2 presents SEM images of the P(VDF–TrFE) nanorod patterns fabricated by the two conventional processes and the immersion crystallization method, respectively. In the case of the crystallization at the ambient state, severe leaning and entanglement of the P(VDF–TrFE) nanorod arrays are observed (see Figure 2a fabricated by the process detailed in Figure 1c). The nanorod arrays obtained using vacuum conditions (see
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Figure 2b fabricated by Figure 1d) showed a still leaning and entangled configuration despite the morphology which was improved compared to that from crystallization at ambient conditions. From the above results, it was clear that we could not obtain a well-aligned nanorod structure by convention methods. Nanorods fabricated by the ambient crystallization method showed, collectively, a leaning morphology, while individual nanorods did not experience any severe deformation. In case of nanorods fabricated by crystallization under vacuum, even though whole nanorods showed fewer leanings than those fabricated using the ambient crystallization process, each nanorod underwent relatively severe deformation.
We were able to obtain well-aligned P(VDF–TrFE) nanorod arrays using the immersion crystallization method, and the alignment of nanorods was dramatically improved (see Figure 2c fabricated according to the process detailed in Figure 1e).
Figure 3 shows the P(VDF–TrFE) nanorod arrays with diverse patterns fabricated by the IC method. There are some patterns with various areas from 4 μm × 4 μm to 70 μm × 35 μm in the SiO2 template. It can be seen that the diameter and the length of the nanorods are ≈120 nm and ≈1.2 μm, which are similar to the dimensions of the holes in the template, indicating that the P(VDF–TrFE) solution was well infiltrated into the template holes (see Figures S1 and S2 in the Supporting Information for details of the SiO2 template and dispersed nanorods). We confirmed both small area patterns of 4 μm × 10 μm (Figures 3a,b) and large area patterns of 70 μm × 35 μm (Figures 3c,d), in which one-dimensional nanostructures were successfully produced (see Figure S3 in the Supporting Information for more images).
We believe that successful fabrication of a well-aligned, onedimensional nanostructure can be attributed to the IC method at elevated temperature. After annealing at 130 °C, the template removal process was carried out sequentially in the conventional processes. Since the template and the polymer are tightly stuck together due to thermal budget from the annealing process at 130 °C, it is difficult to infiltrate the etchant between the template and the P(VDF–TrFE) (i.e., the contact surface). Consequently, it took over 4 h to detach the P(VDF–TrFE) nanorods from the template, and the nanorods were severely entangled after the template removal process. Conversely, with the IC process, since the samples are immersed solely in the heated etchant after the drying process without thermal treatment in vacuum, the etchant could spread easily across the contact surface due to the relatively small adhesion force. Consequentially,
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Figure 2. SEM images of P(VDF-TrFE) nanorod arrays fabricated using crystallization under an a) ambient condition, b) vacuum condition and c) immersion condition, which correspond to Figures 1c–e, respectively.
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Figure 3. SEM images of P(VDF–TrFE) nanorod arrays vertically well-aligned by the immersion crystallization method. a) and b) Small area patterns with 4 μm × 10 μm, and c) and d) large area pattern with dimensions of 70 μm × 35 μm.
the IC method takes less than one hour. In addition, solvent |
effect of the P(VDF–TrFE) nanostructure in the AAO mem- |
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residue elimination by thermal budget makes the polymer |
brane, with diverse pore sizes ranging from 15 to 200 nm.[17] It |
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more dense, and this could help the aligned nanorod array to be |
could be found that their results were in good agreement with |
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maintained during the template removal process. In practice, |
our work, in which a ferroelectric β-phase in the SiO2 template |
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we observed an elimination of absorption peaks near 1680 cm−1 |
with 120 nm pore size was obtained. |
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(carbonyl stretching band) from the solvent residue tests in |
However, it can be observed that the sample prepared under |
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the FT-IR analysis, indicating the presence of the solvent (see |
ambient conditions had an amorphous region at around 2θ = |
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Figure S4 in the Supporting Information for FT-IR analysis of |
17.5° due to incomplete crystallization, despite the application |
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the solvent residue test). |
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of the annealing process at 130 °C. An amorphous region was |
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In order to verify the changes in the P(VDF–TrFE) samples |
generally observed in as-casted P(VDF–TrFE) films without |
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with three different processes, FT-IR and XRD analyses were |
annealing process,[24,25] but this peak must be eliminated after |
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employed, as shown in Figure 4. The IR |
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spectra of all samples clearly show absorption |
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peaks near 842, 880, and 1285 cm−1, indica- |
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tive of the presence of the β-phase of P(VDF– |
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TrFE) (Figure 4a).[22,23] However, there is no |
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peaks of the β-phase of the samples. From |
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at around 2θ = 19.8° can be seen to come |
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from the (200) and (110) diffractions of the |
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ferroelectric β-phase of the P(VDF–TrFE).[23] |
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tructure fabricated by a template with various |
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pore sizes.[11,12,17] Zheng et al. reported that |
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ture of the ferroelectric β-phase as that of the |
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bulk material.[11] Moreover, Lutkenhus et al. |
Figure 4. a) FT-IR spectra and b) XRD patterns of the P(VDF–TrFE) nanorod array sheet fabri- |
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observed that nanoconfinement enhances the |
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cated by three different processes. Red (upper), blue (middle), and black (bottom) solid lines |
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formation and orientation of the ferroelectric |
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indicate the immersion crystallization, crystallization under the vacuum, and the ambient con- |
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β-phase, which relates to the confinement |
ditions, respectively. |
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the annealing process. It is assumed that the solvent residues hinder the crystallization of the polymer. The outer polymer surface, exposed to the air, was more rapidly solidified in the annealing process than the inner portions were, and residual solvent could not easily diffuse through the solidified surface. As a result, it seems that an amorphous phase caused by solvent residue can be detected in the XRD measurement. In practice, we were easily able to observe the oval shapes of nanorods, not cylindrical shapes; we were also unable to observe the crystallites of the P(VDF–TrFE) at the surface side of the formed nanorod arrays (see Figure S5 in the Supporting Information). The amorphous region with a broad spectrum was completely eliminated in the vacuum crystallization process. Compared to the ambient condition process, we were able to obtain a very weak spectrum related with the amorphous region of the P(VDF–TrFE) nanorod sample fabricated via the IC process.
In summary, ferroelectric P(VDF–TrFE) nanorod arrays were fabricated for the first time via the IC method, a simple and convenient method for fabricating polymer nanorods. By using the IC method, it was possible to carry out template removal and crystallization of the polymer simultaneously. We were able to obtain a highly aligned, one-dimensional nanostructure with a high aspect ratio (≈10:1). These results suggest that the IC method can be suitably applied to the fabrication of one-dimensional nanostructures using polymers as starting materials.
Experimental Section
P(VDF–TrFE) [poly(vinylidene fluoride–trifluoroethylene)] (75/25 mol%) copolymer was obtained from Solvay SA and used as received. Potassium hydroxide (KOH) with purity (90%) was purchased from Sigma-Aldrich. N,N–Dimethylacetamide (DMA, Sigma-Aldrich, USA) with purity above 99% was used to dissolve the P(VDF–TrFE) white pellets.
SiO2 templates were fabricated with an 8 inch p-Si wafer in a class 1000 clean room environment. SiO2 thick film was deposited to about 1.2 μm in thickness by PE–CVD (plasma enhanced–chemical vapor deposition) method and patterned by photolithography and oxide etching process. The hole size and depth were ≈120 nm and ≈1.2 μm, and the hole spacing was ≈60 nm. Polymer solutions (15 wt%) were prepared by dissolving the P(VDF–TrFE) white pellets (2.49 g) in DMA (15 mL). To dissolve the solute quickly and fully, sealed vial glass bottles containing the P(VDF–TrEF) pellets and the solvent were sonicated in water for 2 days. KOH 30 wt% solution for the SiO2 template removal was prepared by dissolving KOH white flakes (64.28 g) in deioinzed water (150 mL). SiO2 templates were sliced into 1 cm × 1 cm pieces for experimental convenience after hole patterning. Before casting the P(VDF–TrFE) solution, templates were cleaned with ethyl alcohol to remove the organics, and then the templates were rinsed with deionized water and dried in a vacuum oven at 40 °C for 3 h. P(VDF–TrFE) solution (15 wt%) was dropped on each SiO2 template and infiltrated into the holes under ambient conditions for 10 min. Drying for solidification and annealing for crystallization of the P(VDF–TrFE) were commonly accomplished via three different processes. In Figure 1c, which depicts the method for ambient conditions, the sample was placed on a hot plate when the temperature reached the target temperature. Drying was carried out at 90 °C for 1 h and annealing was carried out sequentially at 130 °C for 16 h on the hot plate under ambient conditions. After the annealing process, the sample was naturally cooled to room temperature. In Figure 1d, which depicts the method with the vacuum conditions, the sample was placed in a vacuum oven. The oven was evacuated to a pressure of ≈10 Pa using a rotary pump for 20 min. After drying at room temperature for 1 h in the vacuum oven, annealing at 130 °C for 16 h was conducted. The sample was cooled to room temperature at a rate of
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1 °C/min after the annealing process. Each prepared sample was soaked in 30 wt% KOH etching solution at 40 °C to remove the SiO2. It took over 4 h to completely separate the nanorod sample from the template. For the immersion crystallization process (in Figure 1e), sample drying was sufficiently accomplished in the vacuum oven at room temperature over 16 h. The annealing process and template removal were simultaneously conducted in hot etchant for one hour. The sample was immersed in the etchant when the etchant reached the target temperature of 100 °C. We used a digital hot plate that has a temperature feedback function of
±0.3 °C. The sample was naturally cooled to room temperature in the etchant solution.
Detached P(VDF–TrFE) nanorod array sheets were rinsed using deionized water and dried in the vacuum oven at room temperature for 16 h. For verification of the crystal phases of the nanostructures, X-ray diffraction (XRD) measurements and grazing incidence reflection absorption Fourier transform infrared spectroscopy (GIRA-FTIR) were performed on a RIGAKU D/MAX-2500 diffractometer at a scanning velocity of 1°/min (40 kV, 300 mA); in order to detect only the surface we used the 2θ scan method, in which the collimated incidence beam was fixed at a grazing angle of 1°, while the detector scanned over the selected angle range. FTIR spectra were obtained using a Bruker Optiks IFS66V/S spectrometer and a HYPERION 3000 microscope. To analyze the morphology of the P(VDF–TrFE) nanostructure, scanning electron microscopy (SEM; Hitachi S-4800) was performed at an accelerating voltage of 10 kV.
Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.
Acknowledgements
This research was supported by the Mid-career Researcher Program (No. 2012-0005609) and Conversion Research Center Program (No. 2012K001337) through the National Research Foundation of Korea (NRF), funded by a Ministry of Education, Science and Technology (MEST) and New & Renewable Energy of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant (No. 20103020060010) funded by the Ministry of Knowledge Economy, Korea.
Received: May 15, 2012
Revised: July 11, 2012
Published online: August 20, 2012
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