
- •Table of Contents
- •List of Figures
- •List of Tables
- •Manual Objectives
- •About This Manual
- •Intended Audience
- •Manual Organization
- •Related Documents
- •Manual Conventions
- •Safeguards
- •Trademarks
- •Introduction
- •Architectural Overview
- •Processor Description
- •Pipeline Description
- •Memory Modes
- •Z80 MEMORY Mode
- •ADL MEMORY Mode
- •Registers and Bit Flags
- •eZ80® CPU Working Registers
- •eZ80® CPU Control Register Definitions
- •eZ80® CPU Control Bits
- •eZ80® CPU Registers in Z80 Mode
- •eZ80® CPU Registers in ADL Mode
- •eZ80® CPU Status Indicators (Flag Register)
- •Memory Mode Switching
- •ADL Mode and Z80 Mode
- •Memory Mode Compiler Directives
- •Op Code Suffixes for Memory Mode Control
- •Single-Instruction Memory Mode Changes
- •Suffix Completion by the Assembler
- •Assembly of the Op Code Suffixes
- •Persistent Memory Mode Changes in ADL and Z80 Modes
- •Mixed-Memory Mode Applications
- •MIXED MEMORY Mode Guidelines
- •Interrupts
- •Interrupt Enable Flags (IEF1 and IEF2)
- •Interrupts in Mixed Memory Mode Applications
- •eZ80® CPU Response to a Nonmaskable Interrupt
- •eZ80® CPU Response to a Maskable Interrupt
- •Vectored Interrupts for On-Chip Peripherals
- •Illegal Instruction Traps
- •I/O Space
- •Addressing Modes
- •CPU Instruction Set
- •eZ80® CPU Instruction Notations
- •eZ80® CPU Instruction Classes
- •Instruction Summary
- •eZ80® CPU Instruction Set Description
- •CALL cc, Mmn
- •CALL Mmn
- •CPDR
- •CPIR
- •DJNZ d
- •HALT
- •INDM
- •INDMR
- •INDR
- •INDRX
- •INIM
- •INIMR
- •INIR
- •INIRX
- •LDDR
- •LDIR
- •OTDM
- •OTDMR
- •OTDR
- •OTDRX
- •OTIM
- •OTIMR
- •OTIR
- •OTIRX
- •OUTD
- •OUTD2
- •OUTI
- •OUTI2
- •PUSH AF
- •PUSH IX/Y
- •PUSH rr
- •RETI
- •RETN
- •RLCA
- •RRCA
- •RSMIX
- •STMIX
- •TSTIO n
- •Op Code Maps
- •Glossary
- •Index
- •Customer Feedback Form

eZ80® CPU User Manual
1
Introduction
The eZ80® CPU is a high-speed, 8-bit microcontroller capable of executing code four times faster than a standard Z80 operating at the same clock speed. The increased processing efficiency of the eZ80® CPU can improve available bandwidth and decrease power consumption. Simply stated, the eZ80® CPU’s 8-bit processing power rivals the performance of competitors’ 16-bit microcontrollers.
The eZ80® CPU is also the first 8-bit microcontroller to support 16MB linear addressing. Each software module, or each task, under a real-time executive or operating system can operate in Z80-compatible (64KB) mode or full 24-bit (16MB) address mode.
The eZ80® CPU’s instruction set is a superset of the instruction sets for the Z80 and Z180 CPUs. Z80 and Z180 programs can be executed on an eZ80® CPU with little or no modification.
The eZ80® CPU is combined with peripherals, I/O devices, volatile and nonvolatile memory, etc., for various eZ80® CPU products within the eZ80® and eZ80Acclaim! product lines. Refer to the eZ80 and eZ80Acclaim! product specifications for more information on these products.1
1.For the sake of simplicity, the term eZ80® CPU is referred to as CPU for the bulk of this document.
UM007712-0503 |
PRELIMINARY |
Introduction |