Embedded system engineering magazine 2005.10

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The combination of dedicated PCI Express cores and Platform ASICs is however leading the way in reducing the cost and risk of PCI Express based designs. Adoption of such a solution means the developer does not have to be concerned with the detailed operation of the PCI Express interface.

The simplicity offered by the approach is illustrated well by reference to the development of a fibre channel host bus adapter (FC-HBA) for a storage area network (SAN). Such a fundamental high-bandwidth infrastructure component has a crucial role to play in maintaining the forward momentum of PCI Express.

The example FC HBA shown in Figure 1 is based on LSI Logic’s RapidChip Platform ASIC and consists of several main blocks, including the storage interface section, the PCI Express interface section, and the user configurable logic block with control processor. GigaBlaze serialiser/deserialiser (SerDes) cores (multi-purpose

GigaBlaze SerDes cores. The GigaBlaze cores convert data between serial and parallel forms, and handle all the power-saving options for PCI Express.

The PCI Express Link core handles the signaling details of the PCI Express link. The link layer processes PCI Express signaling protocols, provides the link initialisation and training (for clock recovery), performs lane alignment, and assembles 64-bit words from the byte-wide output of individual GigaBlaze devices. The link layer element also implements flow control as required by the transaction layer and provide the buffers and automatic retry needed for recovery from serial transmission errors.

The PCI Express transaction core manages the movement of data blocks from the HBA to the host processor as well as processing memory, message, and configuration transactions. This is where the buffering and error-checking of data words takes place. The PCI Express Link core provides parallel data in word-wide format so that the transaction layer core can handle

Figure 2: RapidWorx floor plan of x4 PCIExpress in the RapidChip IntegratorQS Si214 slice.

Figure 3: LSI Logic’s new Xtreme2 family of Platform ASICs provides the resources to tackle high-speed serial applications in the computing, communications, storage, and embedded systems sectors.