Embedded system engineering magazine 2005.10
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You design it.
We’ll connect it to the world.
XPort AR – A NEW Level
of Machine Intelligence
•“Data Center Grade” Security
•Standards Based PoE
•Highly Configurable
•Three Serial Ports & Thirteen Configurable GPIO Pins
•120 MHz Processor
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to 802.11b |
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PUT THE POWER OF THE WEB IN YOUR PRODUCTS.
Imagine providing the ability to access, control, even diagnose and repair your products from virtually anywhere … at any time over a network or the Internet.
XPort™ and WiPort™ device servers enable you to quickly build Ethernet or 802.11b connectivity into
your designs. With a robust operating system, built-in Web server and full
TCP/IP stack, XPort and WiPort have everything you need to
bring your products to market with lightning speed.
And they’re secure. Both have 256-bit AES Rijndael
encryption. WiPort features 128-bit WEP and WPA security.
Lantronix provides the networking expertise, so it’s easier than you may think. WiPort is even FCC-certified, so you don’t need separate certification. Best of all, design changes are usually minimal or unnecessary.
Call or visit our Web site to get a Development Kit and put the power of the Web in your products.
Network anything. Network everything.™
Embedded Systems Show – Stand 630
JADE Communications EMEA Master Distributor | +44 1925 295420 | lantronixsales@jadecomms.com |
©2005, Lantronix, Inc. Lantronix is a registered trademark, and XPort, XPort AR and WiPort are trademarks of Lantronix, Inc.
</News - PCI Express>
ESE Magazine October 05
PCI Express
Compact COM Express
COMPACT COM EXPRESS will be a PCI- Express-based COM on the smallest possible form factor. The initial version will be a pure PCI version.
Kontron will launch the new 95x95cm standard Compact COM (Express) under the brands
microETXexpress (for PCI-Express) and microETX (for PCI only).
ETXexpress (Basic COM Express) measures 118.75 cm2 (100%), and microETXexpress (Compact COM Express) measures 90.25 cm2 (76%).
The pinout for PCI and PCI Express will be on different interfaces. However, the other interfaces for peripherals, network, and storage – such as PCI, IDE, 10/100LAN, and 6x USB 2.0 – are mapped identically.
www.kontron-emea.com
PCI Express chipsets
VIA has announced the VIA PT Series of chipsets for the Intel Pentium 4 platform. These include the ability to use PCI Express and AGP Graphics cards on the same motherboard.
www.via.com.tw
High-Speed Serial
Interconnect Design
ANSOFT has presented a new reference design flow for high-speed serial interconnect, meeting the need to simulate and optimise multi-gigabit serial buses, such as PCI Express.
It is intended to simulate the individual components of the physical layer, including the package, connectors, motherboard and add-on cards or to combine them so that the entire channel can be simulated and verified early in the design phase.
www.ansoft.com/idf.cfm
To read more on PCI Express, turn to the buyer’s guide, starting on page 46.
PCI Express analyzer
Vanguard Express PCI Express Protocol Analyzer from VMETRO is designed for debugging, testing and validating the PCI Express protocol. It allows testing of x1, x4 and x8 PCI Express card-edge and XMC form factors.
The Vanguard Express is operated via USB or Ethernet while using VMETRO’s BusView 5 Graphical User Interface software running under Windows 2000 and XP. A single worksta-
tion can control multiple Vanguard analyzers monitoring different
cols, like PCI-X/PCI, PMC, CompactPCI or VME. It supports advanced decoding of the PCI
Express protocol, including viewing the trace data in lane, packet and data views.
www.vmetro.com
EPIC Express
The EPIC Express specification adds highbandwidth PCI Express I/O expansion to EPIC form factor SBCs without sacrificing support for legacy PC I/O. The specification defines the EPIC SBC interface as well as the mechanical
connectors and pin definitions for Express I/O Expansion cards. The Express interface itself consists a high performance connector and design rules to support up to four EPIC Express I/O expansion cards with up to 6 total PCI Express devices in a unique
stacking configuration.
original EPIC Specification is administered by the PC/104 Embedded and the developers of EPIC Express
intend to submit the new specification to the Consortium by the end of 2005.The specification is published as an open standard by VersaLogic Corp., Micro/sys Inc., Octagon Systems, WinSystems, Inc., and Ampro Computers, Inc.
KISS PCI Express
KONTRON’S KISS (Kontron Industrial Silent Server) family, designed for noise-sensitive environments demanding less than 35 dBA, now supports PCI Express. KISS, which uses Pentium 4 processors up to 3.4 GHz now has two PCIe x1 slots for I/O assemblies and one PCIe x16 slot for high performance graphics cards. Four classic PCI slots are also available.
www.kontron.de
21
90% CUT IN EMISSIONS
AND 50% CUT IN DEVELOPMENT TIME.
THAT’S MODEL-BASED DESIGN.
To meet a tough performance target, the engineering
team at Nissan used dynamic system models instead of paper specifications.
The result: 50% time savings, the first car certified to meet California’s Partial Zero Emissions Vehicle standard, and a U.S. EPA award.
To learn more, visit mathworks.com/mbd
©2005 The MathWorks, Inc.
Accelerating the pace of engineering and science
</Feature>
ESE Magazine October 05
Hardware verification: a new approach
<Written by> Peter Heyes, European Sales Manager, SDC Systems Ltd </W>
Ensuring that hardware is bug free before trying to execute software requires a new approach to hardware verification.
A |
hardware engineers were using the scripting |
able to quickly learn that it was a CPLD configu- |
LMOST ALL embedded engineers will |
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know the feeling, a mixture of excite- |
feature of the verification software platform to |
ration bug and modify the CPLD logic to get both |
ment and anxiety, when it comes to |
isolate the memory errors and learn more about |
verification tests passing. Once the new CPLD |
the stage of “bringing up” a new |
their root cause. |
logic was in place, engineers were able to test |
Increasingly, embedded developers are realising the importance of ensuring that the hardware is free of bugs prior to software development, as the simplest bug can bring future software development to a grinding halt
to get boot code and an operating system up and running on the board. The boot code was ported, but undiagnosed low-level hardware issues with SDRAM memory presented a roadblock, and the Ethernet interface to the boot code was not functioning. These issues made it impossible to get a stable version of the operating system running on the new platform. The lack of a useful 10/100 Ethernet interface meant that it was virtually impossible to quickly load new versions of code. This made testing and re-testing very difficult and slow. Sigpro decided to use a hardware verification software package from Kozio.
Running the software demonstrated two separate failures, one with an Ethernet switch, along with singlebit memory corruption with the SDRAM memory. The SDRAM memory corruption, in particular, would have been very difficult to debug using the operating system. The software verification SDRAM burst test, within the Kozio suite, easily pinpointed the problem. With just a couple of hours of training, the Sigpro
One function of the software is to scan a PCI bus and execute test cases on PCI cards that are connected and discovered. Using a simple test command, data packets are sent from SDRAM across the PCI bus through the Ethernet’s physical port, and looped back to store a received packet in SDRAM. The test suite then validates the receive buffer, checking for data consistency. A senior firmware architect notified ADI of the PCI hang when using the secondary PCI bus, and sent along a pre-built test script that could be used to easily recreate the PCI lock up. The verification software team noted that the same test, when used to test an identical NIC card plugged into the primary PCI bus, did not lock up. Using a PCI analyzer, ADI was able to capture a trace of the lock up. The PCI trace results, along with the test tracing, revealed memory access cycles were visible on the secondary bus but not on the primary bus, indicating an issue with the PCI arbitration logic. Results showed that the PCI arbiter was not granting the bridge control of the primary bus. The hardware developers were
packages will run on the board and provide extensive testing and reporting of board behaviour. The knowledge base is created by working with the latest processor reference designs from Intel, IBM, AMCC, and Freescale.
The benefits of this “off the shelf” technology are considerable and impact both the commercial and the technical aspects of new projects. From a commercial perspective, this type of technology can provide a complete solution at a fraction of the cost it would take to develop and maintain such a test suite internally, and these solutions will often allow engineers to bring up new board designs in record time, giving faster time to market. From a technical perspective, many of these “off the shelf” hardware test solutions will almost certainly surpass past internal solutions used to validate new board designs and will free up engineering time to focus on other aspects of the development. <Ends>
www.kozio.com
www.sdcsystems.com
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the high pin-to-pin performance and instant-on CPLDs, together |
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Programming |
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for glue logic, bus bridging, bus interfacing, power-up and control |
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©2005 Lattice Semiconductor Corporation. All rights reserved. Lattice Semiconductor Corporation, L (& design), Lattice (& design), MachXO, TransFR, and specific product designations are either registered trademarks or trademarks of |
1.2 to 3.3V |
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Lattice Semiconductor
</Standards>
ESE Magazine October 05
A Standard individual:
Are you here?
<Written by> Chris Hills </W>
SOME OF YOU will be reading this at the Embedded Systems Show. If you are not at the show: why not? The place is awash with ideas, coffee, people, companies showing everything that is
new, things that you may not have seen before, as well as one of the best conferences in the UK. The IEE have been able to pull in speakers from around the world. It really is top class. There is also the free PhD Forum.
Good Programmer
I came across a comment on Usenet that really made me think. The poster said he would bet that his source code would have fewer first compile errors than other people. This, he stated, was a measure that he was a Good Programmer. This was coupled with the argument that several languages were “safer” than C as their syntax precluded some errors.
It implied that a Good Programmer writes syntactically accurate code and if it compiles in a “safe” language the program must be safe... The well-known example of the Ariane rocket shows that even with Ada, just because it compiles it does not mean it is right. You can write bad code that compiles in any language!
Safe language
Teaching students in a “safe” language fosters the myth that if it compiles it is “Good”. I had this at university where we were taught using Modula 2 because it was “safe”, even though the compiler was written in assembler with libraries that were so buggy that they were unusable. Teaching students with C, which is “unsafe”, means you [should] have to teach them safe programming techniques and awareness of engineering process. Lecturers should also marking down the use of unsafe and “clever” hacking techniques.
One of the reasons, I think, though I have no empirical evidence for this, that Ada is usually well written is that Ada is usually used in high-integrity systems. Therefore it mostly taught for that sort of environment - with C this is not the case.
The analogy for a using a “safe” language was given that you don’t buy a car with no air bags, seatbelts and dodgy brakes. Well certainly not with dodgy brakes but there are times when you turn off the air bags and don’t use seat belts.
The airbags are turned off in a couple of specific cases but fortunately it is usually by specialist drivers. Seatbelts on the other hand tend to be ignored by some of the less sensible drivers. These less sensible drivers tend to be the ones who also gain points and loose licences for other offences. Also there is a legal requirement to pass both a theory and a practical driving test before you can drive.
This is unlike programming where practitioners are not tested before they can program. We are not taught that we must use “seatbelts” or there is a penalty, which may result in the loss use the right to program. Anyone can “disables air bags” without being qualified.
Which side of the line?
One of the main arguments against licensing I have come across, whether stated explicitly, implied or even unconsciously, is the fear of falling on the wrong side of the line. A wonderful set of diagrams in “Professional Software Development” by Steven McConnell says it better than I can explain.
An absolutely fascinating articled appeared in comp.lang.C++ entitled “Is C faster than C++?”. It evoked a fascinating level headed treatise from P.J.Plauger of Dinkumware who knows what he is talking about.
I agree with him that in general Assembler is smaller and faster than C and C is smaller and faster than C++. Now this does not mean we should all rush off and use assembler. C is much faster, in general, than assembler to write. It is also much easier to test with simple tools than assembler.
On the other hand C++ and the tools are a lot more complex than the C (C90). Now don’t give me the fashionable rubbish about being Object Orientated. There is a lot of ivory tower rubbish talked about that. However when it comes down to real world Engineering (and buzzwords aside) good modular programming with C is, practically speaking, OO. So choose the language you use for sound engineering reasons not fashionable reasons because you want something on your CV.
Disclaimer: These are my own personal views and those of my company PhaedruS SystemS www.phaedsys.org has the full version of this column under Technical Papers. <Ends>
chills@.org
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</Feature>
ESE Magazine October 05
MISRA standards for software development
<Written by> Ken Nathan, PolySpace Technologies </W>
Standards for software development need verification tools support.
SOFTWARE IS becoming more com-
. This is a natural consequence of larger memory capacities and higher performance – it it’s there, we’ll use it. The problem is that, as the software becomes
more complex, so it becomes more difficult to get it working correctly. We all think of the critical systems in the aerospace and automotive industries where there can be no faults. It is now becoming prevalent in consumer electronics and telecommunications applications where loss of reputation can damage the brand.
The big trade-off is the need to maintain competitiveness while ensuring 100% reliability. Even an error that occurs under highly specific conditions is a serious threat to the smooth operation of any device. From a statistical point of view, even an error that happens in a very limited number of improbable test cases on a massmarket product has a great chance of being triggered at least once in the application’s lifetime.
Language of choice
Many of the problems experienced in embedded software development are the result of the complexity inherent to the language of choice, C. C is both a powerful and flexible language that includes high-level applications and low-level description capabilities, such as memory access. Other advantages of C include excellent support for high-speed input-output operations, an
important community of programmers, as well as the availability of cross-compilers that generate optimised binaries for various target processors. All of this makes C an ideal candidate for the development of applications in environments with constrained hardware resources.
However, C also has major drawbacks. Its flexibility makes it easy for errors to be implemented. Pointers may be illegally de-referenced, arrays be out-of-bounds, or arithmetic operations return faulty values, causing memory corruption, false results, even processor halt. Moreover, once the presence of an error has been detected, that same flexibility also means that the code can be difficult to understand. All of this puts a serious dent in the productivity of software development.
Guidelines
The automotive industry has been quick to address these issues with the adoption of guidelines for programming and developing in the C language. The MISRA C guidelines aim at identifying aspects of the C language that should be avoided due to their ambiguity and susceptibility to common programming errors. The guidelines also focus on the development process.
The development of an embedded system can be seen as two main activities – design and build. Obvious care has to be taken in the design phase – especially in the specification of the
design with the customer.
On the build side, coding can take up as little as 30% of the time – but experience shows that there are no hard and fast rules. The debugging and testing is the variable that no organisation can ever predict with any degree of certainty. It depends on the bugs – how easily they are found and how easy they are to fix. MISRA rules highly recommend the detection of run-time errors before the software is tested or deployed.
Structure
Analysing and testing software is best done in a structured way. It is possible to write the software, load it up and run it to see if it works. If it trips up, then you review where it happened and fix what went wrong. By doing this, you greatly increase the chance of adding more errors and the uncertainties increase.
In a structured environment, code is written in small units. The code is then checked and cleared of all run-time errors. The most widely accepted approach in the automotive industry is the PolySpace Verifier tool which can pinpoint run-time errors quickly and automatically. The alternative is a manual code review which, as the amount of code increases, becomes more difficult and prone to human error.
The PolySpace approach uses a branch of mathematics called semantic analysis. Semantic analysis statically establishes a model of the code’s dynamic properties and behaviour
Figure 1: Ariane launches with PolySpace. |
©ESA |
www.polyspace.com |
28
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The Microchip name and logo, the Microchip logo, PIC and MPLAB are registered trademarks of Microchip Technology Incorporated in the USA and in other countries. PICkit and PICC Lite are trademarks of Microchip Technology Incorporated in the USA and other countries. All other trademarks are the property of their respective owners. © 2005 Microchip Technology Incorporated. All rights reserved. ME147Eng/09.05-D
</Feature>
ESE Magazine October 05
DVB & digital TV software standards
<Written by> Ken Helps, Ocean Blue Software </W>
Digital TV is one of the world’s largest emerging consumer technology markets. It will come as no surprise that there is already a plethora of "standards and a bewildering array of acronyms to describe them and their creators.
DIGITAL TV is the convergence of computer technology with broadcast technology to create a new medium broadcasters and consumers. This new platform allows greater economies of
scale, reduced broadcast cost and allows broadcasters to offer a greater choice of TV channels. Perhaps most important, Digital TV creates new revenue-generating business models.
The consumer benefits are better picture quality, better sound quality, and access to a range of multimedia entertainment, interactive shopping, voting and more TV channels.
Open standards
Open software standards allow greater competition – third party companies can design plug-in and add-on products, such as authoring tools and games. An important factor and major benefit of open standards software layers is that of interoperability of software applications across different Digital TV reciever devices. Interoperatbility is the ability to develop software applications on the basis of write once and run anywhere, provided the Digital TV receiver device is compliant.
A world standard
The historic Digital TV standards group and now defunct Digital Audio Visual Council (DAVIC) selected Java TV Virtual machine (VM) and MHEG-6 as the world software standard for Digital TV. ETSI (European Telecommunications Standards Institute – www.esti.org) is now playing a part in assisting in the defining of European Digital TV standards.
The Digital Video Broadcast group (DVB), who have now taken over the mantle from DAVIC, is promoting Java as the core software for the Multimedia Home Platform (MHP) standard with optional plug-in software modules such as MHEG.
MHEG and MHP are both open software standards, which can co-exist, inside the same set top box. These software systems have both been designed with the reuse of software components in mind. Data formats are also backward compatible; therefore, both MHP Java and MHEG can coexist in the same receiver device and share com-
mon software processes and components such as DSM-CC the broadcast data carousel.
ETSI
The DVB software standard is based on the ‘D’ Book for the UK specification and the ‘E’ book standard for European Broadcast software and supports several broadcast media:-
●DVB-T Terrestrial (Freeview in the UK)
●DVB-S Satellite (Sky and soon Freesat in the UK)
●DVB-C Cable
●DVB-DSL Broadband
●DVB-H Mobile handheld devices E.g. mobile phones
MHEG
MHEG defines the term multimedia as a representation of several media types, such as audio, video, text, and graphics – the "Red Button" experience.
The MHEG-5 profile for the UK DVB-T standard has been designed with low cost (zapper) set top boxes in mind. The applications reside at the broadcasters' head end and are transmitted via a broadcast stream to a set top box or television (the receiving device).
Future developments
The future of Java & MHP is unclear. Many countries are merely adopting a low cost, readily available DVB-T solution such as MHEG or basic level Zapper software, which provides pictures and sound but no interactive capability.
The notion of a universal software stack, which could be deployed in many and varied receiver devices including IPTV, DVB-T set top boxes, PCTV plug in cards and televisions with integrated digital tuners has not materialised.
The great success of low cost Freeview set top boxes in the UK has highlighted the need for cheap hardware in other emerging countries. But these "legacy" DVB-T receiver devices (including Freeview) may not support new universal software stacks of MHP Java & MHEG-5, due to hardware limitations. Future broadcast of advanced interactive applications will require consumers to
upgrade or purchase a new set top box.
What is IPTV?
Internet Protocol Television (IPTV) uses web technology, utilising broadband (DSL) transmission to broadcast. Video-on-demand, Digital Television, Video conferencing and VOIP (Voice over IP) telephony are all applications likely to become standard on IP set top boxes.
A complete IP/DVB hardware solution combines software systems to provide Internet access, Video on Demand via broadband and all the Freeview channels via free to Air broadcast streams.
The IP set top boxes are also Digital personal video recorders offering the benefits of hard disk storage to record, store, retrieve and play TV content.
European legislation
The EU has recently chosen not to mandate any single software API/ middleware for European Digital TV broadcasting. This can only hinder a market already struggling under the weight of too many standards. It is likely the decision will see increased cost for developers and the inevitable casualties amongst those who cannot afford to hedge their bets and go with the wrong technology. <Ends>
www.oceanbluesoftware.co.uk
30