SECTION

ARCHITECTURE

2.1 INTRODUCTION

The VIA Eden ESP processor architecture can be either that of the VIA Samuel 2 or the VIA Ezra. It is different from any other x86 processor architecture. This unique processor design provides a significantly smaller die size using less power than any other x86 CPU. The VIA Eden ESP processor features cores that lower power, improve performance (MHz and CPI) and further reduces die size and power. (The major differences between the VIA Eden ESP Samuel processor and the VIA Eden ESP Ezra are highlighted in the descriptions below.)

The VIA Eden ESP processor architecture is based on, and directly exploits, basic “facts” about the current x86 market, applications, and bus environment. While seemingly straightforward, these concepts are not exploited in other processor architectures. The major concepts that shape the VIA Eden ESP architecture are:

!Only a few instructions dominate x86 instruction execution time. On typical applications, over 90% of instruction execution time is due to a handful of basic x86 instructions. Most x86 instructions have no significant impact on performance.

The VIA Eden ESP processor design optimizes performance of the most important x86 instructions while minimizing the hardware provided for the little-used x86 functions (infrequently used x86 instructions are primarily implemented in microcode). The resulting instruction execution speed of highly used instructions is as good or better than comparable processors. For example, the VIA Eden ESP processor executes x86 load-ALU-store instructions in only one clock as compared to several clocks on other processors. The execution time of little-used instructions is impacted to reduce die size, but this has no effect on real application performance.

!Improving clock frequency has higher leverage than improving CPI. The result of advanced computer design approaches over the last few years has been that the improvements in cycles-per- instruction (CPI) often impact MHz improvements, and certainly impact die size. Our belief is that the best way to improve total performance and keep a small low-power die is to improve MHz.