- •Introduction
- •Outline
- •PWB Construction
- •PWB/CCA Examples
- •Types of Rigid PWB
- •Types of Flex PWB
- •Footnotes on Flex PWBs
- •PWB Stack-Ups (1 and 2 Layer)
- •Multi-Layer PWBs
- •Exploded View of Multi-Layer PWB
- •Multi-Layer Stack-Up Examples
- •PWB Stack-Up Guidelines
- •PWB Materials
- •PWB Materials
- •PWB Material Examples
- •Dielectric, Common Thickness
- •Copper Options
- •Etch-Back
- •Etch-Back
- •Signal Distribution
- •Single Ended Structure Examples
- •Differential Structure Examples
- •PWB traces as Transmission Lines
- •Characteristic Impedance
- •Trace Impedance
- •Strip-Line & Micro-Strip Impedance
- •Asymmetrical Strip-Line Impedance
- •Impedance Examples
- •Loss
- •Conductor Loss
- •Loss due to Skin Effect & Roughness
- •Time Delay
- •Signal Dispersion
- •Signal Dispersion
- •Signal Dispersion Example
- •Mitigation of Dispersion
- •Coupling
- •Coupling Examples
- •Mitigation of Coupling
- •Differential Pairs
- •Differential Pair Routing Options
- •Differential Impedance Definitions
- •Differential Impedance Examples
- •Field Intensity - 1
- •Field Intensity – 2
- •Field Intensity - 3
- •Field Intensity - 4
- •PWB Pad and Trace Parameters
- •Vias
- •Fine Pitch BGA (FG456) Package
- •Fine Pitch BGA (FG1156) Package
- •Via Parameters
- •Source Terminations
- •Destination Terminations
- •“Intentional” Mismatch Example
- •“Intentional” Mismatch Example
- •Power Distribution Purpose
- •Supply Power Loss Budget
- •DC Loss Model
- •Power Distribution Considerations
- •Plane Capacitance, Inductance, Resistance
- •Capacitor Parameters
- •Capacitor Parameters
- •Capacitor Guidelines
- •Capacitor Mounting Pads
- •Decoupling Examples
- •Trace Width Example
- •References
- •References (continued)
- •Material Suppliers
- •PWB Fabricators
- •Design Tools
Fine Pitch BGA (FG456) Packageage
Courtesy of
Xilinx
Revision 4 |
Copyright Telephonics 2002-2005 |
55 |
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Fine Pitch BGA (FG1156) Packageage
Courtesy of
Xilinx
Revision 4 |
Copyright Telephonics 2002-2005 |
56 |
|
Via Parameters 
Via Dia |
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10 |
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12 |
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15 |
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25 |
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Pad Dia |
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22 |
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24 |
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27 |
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37 |
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Anti-Pad Dia |
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30 |
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32 |
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35 |
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45 |
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R |
L |
C |
R |
L |
C |
R |
L |
C |
R |
L |
C |
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Length: 60 |
1.55 |
0.78 |
0.48 |
1.25 |
0.74 |
0.53 |
0.97 |
0.68 |
0.60 |
0.57 |
0.53 |
0.83 |
Planes: 5 |
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Length: 90 |
2.3 |
1.33 |
0.66 |
1.88 |
1.24 |
0.69 |
1.45 |
1.15 |
0.78 |
0.85 |
0.92 |
1.08 |
Planes: 7 |
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Notes:
1.R in mΩ , L in nH, C in pF
2.Dimensions are in mils.
3.Planes are evenly spaced.
4.Via inductance can be approximated by:
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4h |
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L =5.08h ln |
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−0.75 nH |
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d |
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h and d are in inches
Revision 4 |
Copyright Telephonics 2002-2005 |
57 |
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Source Terminations
♦Driving waveform is reduced in half by series resistor at start of propagation
♦Driving signal propagates at half amplitude to end of line
♦At end reflection coefficient is +1
♦Reduced peak current demands on driver
♦Limited use with daisychained receivers
50 Ω
A B
A
B
C
D
Delay = T
Zo=50 Ω
C D
1 


0 
1 













0 


1 






0 
1 

0
0 |
T |
2T |
Revision 4 |
Copyright Telephonics 2002-2005 |
58 |
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