Appendix C

Scatter/Gather

This section describes scatter/gather through LLI. It contains the following section:

•Scatter/gather through linked list operation on page C-2

Scatter/Gather

C.1 Scatter/gather through linked list operation

The source and destination data areas are defined by a series of linked lists. Each LLI controls the transfer of one block of data, and then optionally loads a further LLI to continue the DMA operation, or stops the DMA stream. The first Linked List Item (LLI) is programmed into the PrimeCell DMA controller

The data to be transferred described by a LLI (referred to as the packet of data) usually requires one or more DMA bursts (to each of the source and destination).

See Figure C-1 for an example of a LLI. A rectangle of memory has to be transferred to a peripheral. The addresses of each line of data is given (in hexadecimal) at the left-hand side of the figure. The LLIs describing the transfer are to be stored contiguously from address 0x20000.

Figure C-1 LLI example

The first LLI, stored at 0x20000, defines the first block of data to be transferred, which is the data stored between addresses 0x0A200 and 0x0AE00:

•source start address 0x0A200

•destination address set to the destination peripheral address

•transfer width, word (32-bit)

•transfer size, 3072 bytes (0xC00)

•source and destination burst sizes, 16 transfers

•next LLI address, 0x20010

Scatter/Gather

The second LLI, stored at 0x20010 describes the next block of data to be transferred:

•source start address 0x0B200

•destination address set to the destination peripheral address.

•transfer width, word (32-bit)

•transfer size, 3072 bytes (0xC00)

•source and destination burst sizes, 16 transfers

•next LLI address, 0x20020.

A chain of descriptors is built up, each one pointing to the next in the series. To initialize the DMA stream, the first LLI (0x20000) is programmed into the PrimeCell DMA controller. When the first packet of data has been transferred the next linked list item is automatically loaded.

The final LLI is stored at 0x20070 and contains:

•source start address 0x11200

•destination address set to the destination peripheral address

•transfer width, word (32-bit)

•transfer size, 3072 bytes (0xC00)

•source and destination burst sizes, 16 transfers

•next LLI address, 0x0.

Since the next LLI address is set to zero, this is the last descriptor, and the DMA channel is disabled after transferring the last item of data. The channel is probably set to generate an interrupt at this point to indicate to the ARM processor that the channel can be reprogrammed.

Scatter/Gather