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          Файл:ARM PrimeCell audio codec interface technical reference manual.pdf
          
        
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            - •Preface
- •About this document
- •Intended audience
- •Organization
- •Typographical conventions
- •Timing diagram conventions
- •Further reading
- •ARM publications
- •Feedback
- •Feedback on this document
- •Feedback on the ARM PrimeCell Audio CODEC Interface (PL040)
- •Introduction
- •1.1 About the ARM PrimeCell Audio CODEC Interface (PL040)
- •1.1.1 Features of the PrimeCell ACI
- •1.1.2 An example CODEC interface
- •1.2 AMBA compatibility
- •Functional Overview
- •2.1 ARM PrimeCell Audio CODEC Interface (PL040) overview
- •2.2 PrimeCell ACI functional description
- •2.2.1 AMBA APB interface and register block
- •2.2.2 Frequency divider
- •2.2.3 Transmit FIFO
- •2.2.4 Receive FIFO
- •2.2.5 Transmit logic
- •2.2.6 Receive logic
- •2.2.7 Interrupt generation logic
- •2.2.8 Synchronizing registers and logic
- •2.2.9 Test registers and logic
- •2.3 PrimeCell ACI operation
- •2.3.1 Interface reset
- •2.3.2 Clock signals
- •2.3.3 PrimeCell ACI operation
- •2.3.4 System loopback testing
- •Programmer’s Model
- •3.1 About the programmer’s model
- •3.2 Summary of PrimeCell ACI registers
- •3.3 Register descriptions
- •3.3.1 ACIDR: [8] (+ 0x00)
- •3.3.2 ACICR: [5] (+ 0x04)
- •3.3.3 ACISR: [8] (+0x08)
- •3.3.4 ACICDR_L: [8] (+ 0x0c)
- •3.3.5 ACICDR_H: [2] (+ 0x10)
- •3.4 Interrupts
- •3.4.1 Interrupt generation logic
- •Programmer’s Model for Test
- •4.1 PrimeCell ACI test harness overview
- •4.2 Scan testing
- •4.3 Test registers
- •4.3.2 ACITCR [5] (+0x80)
- •4.3.3 ACITMR [3] (+0x84)
- •4.3.4 ACITISR [1] (+0x88)
- •4.3.5 ACITOCR [4] (+0x8c)
- •4.3.6 ACITCDR_L [8] (+0x90)
- •4.3.7 ACITCDR_H [2] (+0x94)
- •A.1 AMBA APB signals
- •A.2 On-chip signals
- •A.3 Signals to pads
 
Chapter 1
Introduction
This chapter introduces the ARM PrimeCell Audio CODEC Interface (PL040) and contains the following sections:
•About the ARM PrimeCell Audio CODEC Interface (PL040) on page 1-2
•AMBA compatibility on page 1-5.
| ARM DDI 0146C | © Copyright ARM Limited 1999. All rights reserved. | 1-1 | 
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