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Файл:ARM PrimeCell advanced audio codec interface technical reference manual.pdf
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- •Preface
- •About this document
- •Further reading
- •Feedback
- •Introduction
- •1.1 About the ARM PrimeCell AACI (PL041)
- •Functional Overview
- •2.1 ARM PrimeCell AACI (PL041) overview
- •2.3 PrimeCell AACI functional description
- •2.4 PrimeCell AACI operation
- •2.5 DMA interface bus protocol
- •Programmer’s Model
- •3.1 About the programmer’s model
- •3.2 Summary of PrimeCell AACI registers
- •3.3 Register descriptions
- •3.4 Interrupts
- •3.5 System loopback testing
- •3.6 Software restrictions
- •3.7 Frequency restriction
- •Programmer’s Model for Test
- •4.1 PrimeCell AACI test harness overview
- •4.2 Scan testing
- •4.3 Test registers
- •4.4 Integration testing of block inputs
- •4.5 Integration testing of block outputs
- •4.6 Integration test summary
- •A.1 AMBA APB signals
- •A.2 Module-specific signals
- •Frame format
- •B.1 AACISDATAOUT frame format
- •B.2 AACISDATAIN frame format
Programmer’s Model
3.7Frequency restriction
The implementation of PrimeCell AACI limits the frequency ratios of PCLK to AACIBITCLK that are allowed for proper functioning of the PrimeCell AACI:
³ AACIBITCLK PCLK -----------------------------------------
5
implies:
PCLK ³ 2.4576MHz
3-44 |
Copyright © ARM Limited 2000. All rights reserved. |
ARM DDI 0173B |
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