A minimal-logic design of the complete decoder is shown in Figure 3.11. Observe the shared gates used to implement two or more decoders. Also, note that when connecting gates to gates, bubbles indicating negative logic either appear on all ends of a line or do not appear on an end of any line. The reader is invited to design a minimal incomplete decoder for the address map shown in Table 3.1.

The wide mode has some additional decoding considerations with respect to the LSTRB signal. One may write into an 8-bit memory or output register using a STAB instruction or the equivalent, at an even or an odd address, or one may write into a 16-bit memory or output register using a STDinstruction or the equivalent. An enable for an 8- bit memory handling the left, high-order byte of a 16-bit word should write only if a STD instruction is used or a STAB instruction uses an even address. This occurs when R/W and AO are low. An enable for an 8-bit memory handling the right, low-order byte of a 16-bit word should write only if a STD instruction is used or a STAB instruction uses an odd address. This occurs when R/W and LSTRB are low. Reading is not generally a problem in the wide expanded mode, because regardless of whether 16 bits are read or 8 bits are read from an even or odd address, the 6812 will read 16 bits and, if necessary, use the correct 8-bit value out of the 16 bits that are read.

In §6.2, we resume the discussion of decoding. The 6812 has a Lite Systems Integration Module in it that decodes addresses and provides chip select signals. It can be used in lieu of, or in addition to, the SSI/MSI-based decoder discussed above.

3.3 Conclusions

The study of microcomputer data and address buses is critical because scanty knowledge in these areas leads to serious interface problems. Before getting on these buses, data inside the microprocessor are unobservable and useless for interfacing. But when data are on the bus, they are quite important in the design of interface circuitry. This chapter has discussed what address, data, and control signals look like on a typical microcomputer bus. You should now be able to read the data sheets and block or logic diagrams that describe the microprocessor and other modules connected to the bus. You should also be able to analyze the timing requirements on a bus. And, finally, you should have sufficient hardware background to understand the discussions of interface modules in the coming chapters.

If you found any difficulty with the discussion on hardware modules and signals, a number of fine books are available on logic design. We recommend Fundamentals of Logic Design, fourth edition, by C. H. Roth, PWS Publishing Co., because it is organized as a self-paced course. However, there are so many good texts in different writing styles that you may find another more suitable. Further details on the MC68HC812A4 can be obtained from the MC68HC812A4TS/D Motorola, 1996; §11 gives the timing specifications of the microcomputer. As noted earlier, we have not attempted to duplicate the diagrams and discussions in that book because we assume you will refer to it while reading this book; also, we present an alternative view of the subject so you can use either or both views. The final section in this chapter, however, has not been widely discussed in texts available before now. But several books on interfacing are currently being introduced, and this central problem should be discussed in any good book on interfacing.

Problems

Problems 1 and 2 are paragraph correction problems. See the guidelines on page 38. Hardware designs should minimize cost (minimal number of chips, where actual chips are specified; and when the number of chips is the same, a minimal number of gates and then a minimal number of pin connections, unless otherwise noted). A logic diagram should describe a circuit in enough detail that one could use the diagram to build a circuit. When logic diagrams are requested, use bubbles to represent negative logic and gates representing high and low signals, and show pin numbers where applicable. A block diagram should describe a circuit in enough detail that one could write a program to use the block diagram. When block diagrams are presented, show variables and gates representing true and false values, and show the maximum detail you can, unless otherwise stated. (Note that a box with SYSTEM written inside it is a block diagram for any problem, but is not a good answer; give the maximum amount of detail in your answer that is possible with the information provided in the question.)

1.* A negative logic signal has a low signal representing a true variable. To negate a variable is to make it low. A synchronous variable is one that repeats itself periodically, like a clock. A family of integrated circuits is a collection of integrated circuits that have the same architecture. A block diagram describes the realization of some hardware to show exactly how to build it. In a block diagram, logic functions are in terms of true and false variables. Vss is normally +5 volts. We normally put .001-microfarad bypass capacitors across power and ground of each MSI chip or about every 4 SSI chips.

2.* A buffer is a gate whose output can be connected to the outputs of other buffers. Open collector drivers can be connected on a bus, called a wire-OR bus that ORs the outputs in positive logic. When a tristate bus driver is disabled, its outputs are pulled to 0 volts by the driver. A flip-flop is a module that copies the variable on the D input when the CLOCK input is high, and leaves the last value in it at other times. The setup time for a D edge-triggered flip-flop is the time the data must be stable before the edge occurs that clocks the data into the flip-flop. The word width of a microcomputer is the number of bits put into the accumulator during an LDAA instruction. The memory cycle time is from when the address is stable until data can be read from or written into the word addressed. Read-only memories store changing data in a typical microprocessor. A programmable array logic (PAL) chip is similar to a PROM, having fuses that are blown to program the device, and it is suitable for "glue" logic and address decoders.

3.Draw the integrated circuits of Figure 3.10 so that they use OR gates rather than AND gates, and put appropriate bubbles on inputs or outputs to get the correct function.

4.A 74CH133 chip being unavailable, show how to implement such a chip's function using the least number of 74HC04s and 74HC20s (see Figure 3.10).

important to them, we studied the timing of such program segments. We studied indirect and serial I/O, which are especially attractive to the 'A4 and other microcontroller systems. Finally, we considered how the SPI can assist in serial I/O. We can use the same approach to designing an 1C (or an I/O system) as we can for studying it, and thus develop an understanding of why it was designed as it was and how it might be used. In the remaining chapters, these techniques are extended to analog interfacing, counters, communications interfacing, display, and magnetic recording chips.

Do You Know These Terms?

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