Arrays or strings can be used with buffers to input or output many numbers in a similar way. Queues are implemented in buffers to input or output data when the program needs them in the same order that they are input or when the device needs them in the same order that they are provided by the program, but at different times than they are provided. Generally, data structures are used to maintain order in the data that are being transferred between the MPU and an input-outputdevice.

11.4 Synchronization Hardware

The previous section illustrated the use of a delay loop to synchronize the output to a traffic light controller. In the next sections, we consider the use of gadfly loops and interrupts to synchronize input and output. These use hardware to indicate when I/O is to be done. The most commonly used hardware is an edge-triggered flip-flop that is set when an output is needed or when an input is available. In this section, we introduce the ' A4 or 'B32 basic counter/timer device to illustrate edge-triggered sensing of I/O status signals. (See Figure 11.7.) We also briefly discuss PORTT and its direction bits.

Figure 11.7. The Counter/Timer Subsystem

unsigned char i; void main() {

TSCR = 0x80; TTMSKl = TFLG1 = TCTLE = 1; asm CLI

do ; while(l);

}

void interrupt 8 hndlr(void){ TFLG1=1; /*clrreqst*/ i++; /* inc count */}

An optimized assembly-language program segment for the body of the C procedure is

An optimized assembly-language program segment for the handler is

The main procedure above initializes the control registers and loops forever. The I condition code bit is generally clear after the 6812 is reset and must be cleared to enable interrupts to occur. A high-level language like C generally does not have a way to enable interrupts, except by inserting embedded assembly language. The statement asm CLI inserts CLI into the assembly-language program. Each time another vector element is to be output, a switch is closed, and PORTT bit 0 sees a rising edge. This causes an interrupt, and the handler is entered. This handler increments the count.

We further illustrate an interrupt-based traffic light controller that is essentially the same as the gadfly-based traffic light controller example. The main procedure initializes the control registers, waits for all elements to be output, and then disables the interrupt. Each time another vector element is to be output, a switch is closed, and PORTT bit 0 sees a falling edge. See Figure 11.9. This causes an interrupt, and the handler is entered. This handler outputs an element from the vector. To output the vector, execute

}

void interrupt 8 hndlr (void) (TFLGl=l;PORTA=buff erf—i ];/* output data*/}

get: BRCLR SC1SR,$20,get LDAB SC1DR

RTS

* void main() { char i;

PSHA

* SC1BD = 52; 7*9600 baud*/ SC1CR = OxC; /* enable Xmt, Rev devices */

MOVW #52,SC1BD

MOVE #$C,SC1CR

* i = SC1SR; i = SC1DR; i = SClSR; i = SC1DR; /* clear RDRF */

LDAB SClSR

LDAB SC1DR

LDAB SClSR

LDAB SC1DR

* for(i = 0; i < 9; i++) put(str[i]);

* do j = get(); while( j != ' \ r ' ) ;

12:BSR get

STAB j CMPB #13

BNE 12

PULA

RTS

Figure 11.18. Program with Disassembly

unsigned char

PORTB61,DDRB@3,ATDCTL2@Ox62,ATDCTL5@Qx65,ATDSTATO@Ox66, ADR380x76;

if((k > i) && (( j = (k ~ i ) ) > hi )) hi = j;

Figure 11.19. Another Program with Disassembly