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Cadence Tutorial

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Example: CMOS Inverter Layout

In this tutorial, a simple CMOS inverter layout will be drawn step by step. We will start with a simple design idea and will complete the mask layout using different techniques.

Steps of Layout Design

Starting up Design Idea Create Layout Cellview Virtuoso and LSW

NMOS Drawing the N-Diffusion (Active) The Gate Poly Making Active Contacts Covering Contacts with Metal-1 The N-Select Layer

PMOS Drawing the P-Diffusion (Active) Transistor Features The P-Select Layer Drawing the N-Well

Connecting both transistors Placing the PMOS and NMOS Connecting the Output Connecting the Input Making a Metal-1 connection for the Input Power Rails P Substrate contact N Substrate contact Enclosing the Substrate Contact

DRC and Finalizing Design Rule Checking Final Layout

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