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Contents

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New Features and Enhancements in Taurus TSUPREM-4 and Medici Version A-2007.12

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Organization and Role of TCAD Teams in a Modern Semiconductor Foundry: A Leading Experience in Chartered Semiconductor

by Dr. Francis Benistant

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Latest Edition

Believeitornot,thisisthefourthIEDMedition of TCAD News since the ISE acquisition in November 2004. While device scaling continues in the semiconductor industry, we are adding significant modeling capabilities in our TCAD simulators, enabling our customers to stay ahead of Moore’s law.

It is my pleasure to announce a new release (A-2007.12) of the Sentaurus and Taurus TCAD tools. Since its inception in October 2005, Sentaurus continues to set the standard for process and device simulation. In Sentaurus A-2007.12, new models for scanning laser annealing, selective epitaxy, and hybrid orientation technology keep abreast of the latest trends in process technologies. This release also includes enhancements to silicidation and 3D modeling to improve the robustness and flexibility of the tool. Kinetic Monte Carlo modeling continues to gain interest for studying complex diffusion and clustering phenomena in advanced silicon processing.

In device simulation, support for high-k dielectrics, enhancements to stress modeling, a more comprehensive model for floating semiconductor regions used in flash memory, and a new model for simulating phase-change memory are significant additions to the capabilities to simulate leading-edge silicon devices. In optoelectronics,animprovedraytraceropens the way for state-of-the-art 3D simulations of LEDs and other optoelectronic devices.

For our Taurus customers, there are new features and enhancements in TSUPREM 4 and Medici, the former includes important features in implantation, stress-dependent diffusion, and facet formation in epitaxy, and the latter includes new options in mobility and band-to-band modeling.

This edition also includes a guest article from Chartered Semiconductor sharing its experience of using TCAD tools in a manufacturing environment.

Thank you for your continued support of our products, and I trust that you will enjoy reading this new edition of TCAD News.

With warm regards,

Terry Ma

Group Director, TCAD Business Unit

Contact TCAD

For further information and inquiries: tcad_team@synopsys.com

Figure 4. Temperature in a scanning laser simulation at different times: (a) t = 0 s, (b) t = 0.1 ms,

(c) t = 0.2 ms, and (d) t = 0.3 ms.

Figure 7. MOS structure with SiGe pockets, simulated by MGOALS3D etching and deposition module, includes: (a) gate formation, (b) 5 nm oxide spacer isotropic deposition, (c) 100 nm nitride spacer isotropic deposition, (d) spacer formation by anisotropic etching, (e) SiGe isotropic etching, and (f) SiGe pockets deposition by fill deposition.

gradually from an initial small area at t = 0 to a final large area at t = 0.3 ms. The peak temperature is also seen to increase with time due to heat accumulation.

The temperature profiles from a laser simulation are subsequently used in mechanics and dopant diffusion simulations. Figure 5 shows the temperature profile from a typical scanning laser simulation used as the annealing temperature for dopant diffusion. This temperature profile has a sharp rising edge and a prolonged tail. A similar behavior is observed when using a spatially fixed laser beam with a Gaussian temporal profile.

Time [s]

Figure 5. Temperature profile resulting from a scanning laser simulation.

Selective Epitaxy

Selective epitaxial growth is becoming a mainstream technology for advanced CMOS processes as well as a variety of other silicon devices. Applications include elevated SiGe source and drains for inducing compressive stress under the gate in PMOS structures, and for HBTs using a SiGe base.

Low-temperature epitaxy (LTE) is different from high-temperature epitaxy in several ways. Depending on conditions, LTE may grow on insulators as well as on silicon. The growth on insulators typically proceeds only after an initial nucleation layer has formed, and the growth produces polycrystalline silicon; whereas, growth on silicon commences immediately. In addition to the delay of growth due to nucleation time, the material grown on oxides can proceed at a different rate from growth on single-crystal silicon. These effects can now be simulated using Version A-2007.12 of Sentaurus Process.

When specifying LTE in the diffuse command, Sentaurus Process nucleates a ‘native’ layer, after a user-specified nucleation delay, and grows distinct regions on top of different materials, allowing for different growth rates depending on the starting material. In addition to these features, all epi command parameters can be specified in the temp_ramp command, and an additional parameter epi.doping.final is available

•The number of mesh elements is no longer restricted to a power of two.

•Users have more control over the internal Sentaurus Process KMC mesh. Although it is usually not necessary, users can now access parameters to control the minimum and maximum size of the elements. Using refinement boxes to refine the internal Sentaurus Process KMC mesh is also allowed.

Stress and SiGe

Sentaurus Process KMC Version Z-2007.03 introduced stress dependencies for point defects only. In Version A-2007.12, these dependencies are extended to all defects in the simulation, and SiGe dependencies for points defect are introduced as well. This makes Sentaurus Process KMC a very valuable tool to investigate the impact of local perturbations to formation and binding energies of defects.

In particular, a correction to the binding, migration, and formation energies of mobile species due to germanium has been introduced as = K . CGe, where CGe is the local germanium concentration, K is a constant specified as an input parameter for each defect, and is the variation to the energy.

These corrections, even when they are only appliedtothemigration,binding,andformation energies of mobile species, are performed to other defects when needed. For example, the activation energy of an extended defect to emit interstitials will also be corrected because this activation energy contains an interstitial migration energy term.

Regarding stress, local hydrostatic pressure corrections have been added to all of the different defects. These contributions are in addition to the existing dependencies of the mobile particle energies with stress or SiGe. These extra dependencies are included in:

•Amorphous pocket recombination rate

•Extended defect (small clusters, {311}s, loops) emission

•Recrystallization front velocity

•Potential energies of impurity clusters

•Binding energies to interfaces

In general, these dependencies are taken into account by a term such as (P) = P . V, where (P) is the correction to the energy, given by the pressure (P) multiplied by the activation volume ( V).

User-defined Materials

Compared to previous versions, users can now define new materials, together with their respective properties. Sentaurus Process KMC has three different models or templates for new materials:

•Discard: Material in which particles are discarded and no models apply. An example of this material type is gas.

•Simple: Material in which only direct diffusion, with no interstitialor vacancy-

mediated diffusion, is allowed. Extended defects, impurity clusters, and Fermilevel dependencies are also absent, restricting the material to mobile particles with no interactions, amorphization, or recrystallization among the particles. This model is useful for materials in which dopant diffusion is of secondary importance for the simulation or for materials whose properties are not fully known. Examples of this material type are silicon nitride and silicon oxide.

• Full: All models – including Ge, Fermi, and stress dependencies – and all defects

– extended defects, amorphous pockets, impurity clusters, amorphization, and recrystallization – are treated. An example of this material type is silicon.

For new materials with full modeling, a complete set of parameters can be redefined

As an example, Figure 12 shows the plots of effective mobility versus effective field extracted from simulations of an NMOSFET device at different lattice temperatures when µrps is used in conjunction with the Lucent mobility model and a simplified model for µrcs. These results approximately replicate the data shown in Figure 1 of [3].

Figure 12. Effective mobility versus effective field extracted from simulations using Lucent mobility model with RPS degradation and a simplified term for RCS.

The αrcs and αrps factors in the full mobility expression can be used to emphasize or de-

emphasize the RCS and RPS degradation components, respectively. Although this is an empirical model, it is expected that, with parameters chosen for a specific high-k dielectric technology, it can be used to describe the mobility degradation over a broad range of device dopings, temperatures, and fields.

Memory Devices

Sentaurus Device has a comprehensive set of mechanisms and models for simulating nonvolatile memory devices.

The charge-storing region of the nonvolatile memory cell can be charged and discharged using hot-carrier injection (HCI) or tunneling. In the case of thick oxide layers, the charge-storing region can be charged by injection over the potential barrier at an oxide–semiconductor interface using one of the available HCI models: lucky, Fiegna, or customer-defined HCI models using the physical model interface (PMI) of Sentaurus Device. At higher electric fields, the Fowler– Nordheim tunneling mechanism is available to simulate tunneling through thick oxides. For thinner oxides, two tunneling models, Schenk direct tunneling and nonlocal tunneling, can model accurately the tunneling through thin oxides; nonlocal tunneling is the more versatile model.

Sentaurus Device supports three ways of representing the charge-storing region itself. The simplest and fastest one is the metal floating gate method where the chargestoring region is represented as a metal contact surrounding the region that is empty inside. For this method, only information about the total charge in the memory element is computed.

A more comprehensive method is the semiconductor floating region method where the charge-storing region is represented by a floating semiconductor region for which the electrostatic potential and charge distribution is computed. A typical application of this method is a memory device with a polysilicon layer as the charge-storing region.

Themostrealisticbutslowestwaytorepresent the charge-storing region is a semiconductor region for which a full set of transport equations is solved. A typical application is a SONOS device.

Version A-2007.12 of Sentaurus Device includes enhanced flexibility in selecting the aforementioned models used in program and erase operations. Now all models can be applied interchangeably for single or multiple floating-gate structures. In the

case of multiple-gate memory devices (see Figure 13), Sentaurus Device automatically detects and computes the injection/tunneling current or charge for each charge-storing region. For example, in Figure 13, the spot with the maximum HCI current is located below the first gate from the left side. By changing the device biasing, the location of this maximum may shift and move to the next gate. Sentaurus Device dynamically computes the current to be injected for each of the charge-storing regions as a function of biasing.

Figure 13. Multiple-gate memory devices.

HSPICE® Compact Models

The Synopsys HSPICE compact models are considered the gold standard for accurate circuit simulations. Sentaurus Device now supportsanup-to-dateversionofthefollowing HSPICE models:

•Level 1 IDS: Schichman–Hodges model

•Level 2 IDS: Grove–Frohman model

•Level 3 IDS: Empirical model

•Level 28 modified BSIM model

•Level 49 and Level 53 BSIM3v3 MOS models

•Level 54 BSIM4 model

•Level 57 UC Berkeley BSIM3-SOI model

•Level 59 UC Berkeley BSIM3-SOI fully depleted (FD) model

The HSPICE models in Sentaurus Device correspond to HSPICE Version Z-2007.03.

Users have the option to incorporate foundrycertified MOS compact models into their mixed-mode simulations. All major analysis modes are supported such as quasistationary, transient, and AC simulations.

Compared to single-device simulations, a mixed-mode simulation allows the driving of a physical model within a more realistic environment. Due to the computational efficiencyofthecompactmodels,mixed-mode simulations approach the same performance as single-device simulations. Additionally, extracted device parameters can be used in the compact models to improve the accuracy of the simulation further.

Enhancements in Stress Modeling

Modeling of mechanical stress-induced effects in MOSFETs is a critical issue for modern CMOS devices. Both unintentional stress (for example, from shallow trench liner oxidation) and engineered stress, used to enhance device performance, must be considered. In general, mechanical stress affects all semiconductor properties, but the properties most impacted are the band structure and the mobility. Sentaurus Device provides a complete set of models to simulate the impact of stress and other properties.

k.p Method for Electron and Hole Band Structures

For electrons, the most common approach used to model the impact of stress on device behavior is linear deformation potential theory (LDPT). Recently, it was discovered [4] that, for a general stress distribution, it is necessary to account explicitly for the shear component of stress that is omitted in LDPT. According to degenerate k.p theory, LDPT should be modified to include a term for the valley shift of the form [4]:

where i, j, l are band indices, εj,l is a shear strain, and k and are model parameters.

For holes, the strain-induced shifts of valence bands can be computed using 6x6 k.p theory applied to the heavy-hole, light-hole, and split-off bands as described in [5].

Both of these k.p options for electrons and holes are part of Sentaurus Device Version A 2007.12. An example of the impact of stress on the valence band in silicon is shown in Figure 14. The dramatic change in the band structure under –1 GPa of uniaxial <110> stress is the underlying mechanism for the large improvements in device performance obtained for PMOSFETs using engineered stressors such as embedded SiGe.

Figure 14. Isoenergy plots at 25 meV below the top of the band for relaxed Si (top) and uniaxial –1 GPa <110> stress (bottom).

Reduction of Stress Effect on Mobility at High Normal Electric Field

In MOSFET channels, it is well known that the stress-induced enhancement of the carrier mobility is typically reduced at high gate voltage. This is due to several physical mechanisms [6]. One part of the reduction is due to a change of carrier repopulation because the Fermi energy and channel quantization are dependent on the gate voltage. Another contribution to the reduction is related to a dependency of the carrier scattering on the normal electric field.

Figure 15 shows the simulated stressinduced electron mobility enhancement in an NMOSFET (red and blue curves) along with experimental data recomputed from the effective electric field data of [6]. The red curves represent a simulation with Fermienergy dependency in the Sentaurus Device stress models. The blue curve shows the result for 0.13 GPa stress, which effectively accounts for the electron repopulation due to quantization. The good agreement between the simulations and experimental data for 0.13 GPa of stress suggests that the reduction of the stress-induced mobility enhancement in MOSFETs is mainly due to

Figure 15. Stress-induced enhancement of electron mobility µe for a MOSFET with a <100> channel and (100) surface as a function of gate voltage and stress.

Sentaurus Device Monte Carlo

New capabilities and improvements have been added to Sentaurus Device Monte Carlo VersionA-2007.12,withparticularfocusonthe simulation of hole transport in strained-silicon devices, including p-type MOSFETs. The new features include the built-in calculation of the valence band structure based on a 6x6 k.p method. In addition, the scattering models for holes have been extended to include strain effects on the band structure in processes such as scattering by acoustic and optical phonons, ionized impurity, and surface roughness. Further, the one-dimensional (1D) Schrödinger quantum-correction model has been extended to include the strain effect. Sentaurus Device Monte Carlo also supports general coordinate transformations to handle arbitrary combinations of channel and surface orientations, the automatic termination of a simulation based on the error control, and a new linear-spline fitting method for the impurity scattering at high doping.

Full Brillouin Zone Strain Model for Holes

Version A-2007.12 contains a new full Brillouin zone (FBZ) model for hole transport in strained materials, available for the valenceband scattering rates and transport. The scattering rates are calculated as a function of the density-of-states that is directly extracted from the full band structure. The modified phonon-scattering rates take full account of the effects of the valence-band splitting and the nonparabolicity. It also adds the full range of scattering rates. It calculates all necessary quantities (except for phonon energies and deformation potentials) to make this model compatible with a stressed simulation. In addition to phonon scattering, the ionized impurity scattering and the surface roughness scattering models have been improved to include the changes in the valence band structure due to stress.

For example, a simulated PMOSFET device is shown in Figure 18. Simulation results with and without –1 GPa compressive stress along the <110> channel are shown in Figure 19. The horizontal axis shows the transient time, and the vertical axis shows the drain current. The gate and drain bias conditions are 1 V and –0.2 V, respectively. It can be seen that the stress increases the on-current by approximately 50%.

Figure 18. PMOSFET device structure (Leff = 40 nm, Tox = 20 Å) used for simulations with Sentaurus Device Monte Carlo with simulated Monte Carlo hole density.

Time [s]

Figure 19. Drain current versus transient time as simulated with Sentaurus Device Monte Carlo using FBZ model; black line is relaxed silicon and blue line is –1 GPa compressive stress.

6x6 k.p Band Structure Calculation

A built-in k.p valence band structure calculator has been added. Depending on the specification of the k.p parameters and the stress, Sentaurus Device Monte Carlo generates the band structure tables at the beginning of a simulation. This method is sufficiently fast so it incurs virtually no increase in simulation time. This saves users the effort of preparing the full band structure files for each stress condition. Figure 20 shows the shape of the equienergy contours of the top valence band for the compressive and tensile stress conditions of 1 GPa along the <110> direction computed by the k.p method.

Figure 20. Equienergy contours of the top valence band with tensile and compressive stress of

1 GPa along the <110> direction: red contours are for the compressive case, and blue contours are for the tensile case at –10 meV, –25 meV, and –50 meV.

Arbitrary Channel and Surface Orientation

Sentaurus Device Monte Carlo now supports devices with an arbitrary channel and surface orientation. This version contains improvements in the specula scattering (as a reflective boundary condition), the transformation between the crystal and device coordinates in the kinetic equations, and the adjustment of the surface roughness scattering as a function of the surface orientation. The 1D Schrödinger solver also takes into account the surface orientation on which the quantization occurs.

Other Improvements

Additional improvements include:

•Anewalgorithmisavailablethatautomatically stops the simulation when the noise level of a user-specified parameter drops below a chosen value. This frees users from having to start and stop the simulation to obtain a sufficiently converged solution. The criterion can either use the student-t distribution or a time derivative model.

•A new linear-spline fitting for the impurity scatteringrateathighimpurityconcentration has been added to allow for a better fitting of the mobility at high doping.

Sentaurus Device Optoelectronics

New features and innovations in the optoelectronic capabilities of Sentaurus Device are improving the simulations of CMOS image sensors, solar cells, lightemitting diodes (LEDs), and lasers. An improved raytracer, comprehensive white LED simulation, and organic LED simulation capabilities have been introduced.

Improved Raytracer

The core computation engine of the raytracer has been replaced by one that is better designed for multithreading. The improved raytracer is based on linear polarization and fast manipulation of rays with vector algebra. As a result, good speedups have been achieved: eight times faster in 2D and 40 times faster in 3D. The speed can be further enhanced by multithreading. Since raytracing for different branches of the raytree is mutually independent, multithreading speedup is linear. For example, a 15.7 times speedup with a 16processor machine has been achieved.

The raytracer handles the reflection and transmission of rays across different materials with complex refractive indices. Users can also specify reflectivity and transmittivity values independently at special raytrace boundaries. Consequently, perfect-reflecting or perfect-absorbing boundary conditions can be achieved. In addition, special raytrace PMI boundaries can be defined. At such boundaries, users can modify the properties of the impinging and exiting rays, allowing for manipulation of the raytracing process.

Visualization of the raytree in Sentaurus Workbench Visualization has improved. The raytree can be plotted in Sentaurus Workbench Visualization together with the device, and the intensity of each ray can be tracked independently.

Comprehensive White LED Simulation

Modeling white LEDs requires the selfconsistent coupling of optical and electrical simulations. The electrical simulation solves the coupled Poisson, carrier continuity, and heat equations. The optical simulation uses a spectrally resolved raytracing approach. Each ray is associated with a spectrum and the spectrum evolves as it traverses regions of absorption and amplified spontaneous emissions. In luminescent regions, such as the phosphor regions in modern white LED designs, the spectrum undergoes spectral conversion. Part of the spectrum is absorbed and a new emission part is added, resulting in a modified spectrum.

For rays that exit the device, Sentaurus Device collects the spectra and computes an aggregate spectrum that can be similarly measuredinanexperimentalsetting.Phosphor commonly contains large particles, and these cause photons to be scattered in preferred directions. The Henyey–Greenstein scattering probability is used to determine the directions of scattering. The Henyey–Greenstein scattering probability for the scattering angle, θ, is given as:

where g is the asymmetry factor of the particle size distribution. The parameter g can be correlated to the size and density of the phosphor particles.

The electrical and optical simulations are coupled using the generalized photonrecycling theory [7][8]. In this way, the comprehensive and self-consistent simulation of white LEDs can be achieved.

Figure 21 shows a typical LED structure that is encapsulated by phosphor. Two versions of the device were simulated: (A) half the device is encapsulated by phosphor, and (B) the entire device is covered by phosphor.

Figure 22 plots the simulated far-field (FF) spectra of the two devices. The original blue spectrum produced in the quantum wells is also shown. The results indicate the importance of self-consistent simulation in the design of color rendering for white LEDs.

Organic LED Simulation

Organic materials are formed from molecular chains, and the primary carrier transport mechanism (electrons and holes) is through a ‘hopping’ process. The lowest unoccupied molecular orbital (LUMO) and the highest occupied molecular orbital (HOMO) energy levels in organic materials are analogous to the conduction and valence bands, respectively.

In addition, excitons need to be considered since these bound electron–hole pairs contribute to the distribution of electron and hole populations. Traps are also central

combination of semiconductor models and organic physics models is required to model physical transport in organic devices within the framework of Sentaurus Device.

Phosphor

Figure 21. Typical design for white LED that contains a blue LED encapsulated in phosphor. The optical mesh is used in raytracing. Device A is half encapsulated with phosphor as shown.

Wavelength [nm]

Figure 22. Spectrum of blue LED (blue) plotted with far-field (FF) spectra of device A (red) and device B (black).

The following models in Sentaurus Device are available for organic device simulations:

•The Poole–Frenkel mobility model. It is used to model hopping transport of the carriers (electrons and holes). It is dependent on electric field and temperature.

•A singlet exciton equation. It models the diffusion process, the generation from bimolecular recombination, and the loss from decay and optical emissions of singlet excitons. Note that only Frenkel excitons (electron–hole pairs existing on the same molecule) participate in the optical process in organic materials.

•Organic–organic heterointerface models. Organic devices require special treatment for the ballistic transport of carriers and bulk excitons across heterointerfaces with energy barriers.

•Gaussian density-of-states. It approximates the effective density-of-states for electrons and holes in disordered organic materials.

•The Langevin bimolecular recombination model. It is used to model the recombination process of carriers and the generation process of singlet excitons.

•Optical emission as a result of radiative decay of singlet excitons.

These models can all be activated in a coupled manner in Sentaurus Device to provide a selfconsistent simulation of organic devices.

References

[1]H. Tanimoto et al., “Modeling of Electron Mobility Degradation for HfSiON MISFETs,” in International Conference on Simulation of Semiconductor Process and Devices (SISPAD), Monterey, CA, USA, September 2006.

[2]M. N. Darwish et al., “An Improved Electron and Hole Mobility Model for General Purpose Device Simulation,”IEEETransactions on Electron Devices, vol. 44, no. 9, pp. 1529–1538, 1997.

[3]W. J. Zhu and T. P. Ma, “Temperature Dependence of Channel

Mobility in HfO2-Gated NMOSFETs,” IEEE Electron Device Letters, vol. 25, no. 2, pp. 89–91, 2004.

[4]E. Ungersboeck et al., “The Effect of General Strain on the Band Structure and Electron Mobility of Silicon,” IEEE Transactions on Electron Devices, vol. 54, no. 9, pp. 2183–2190, 2007.

[5]T. Manku and A. Nathan, “Valence energy-band structure for strained group-IV semiconductors,” Journal of Applied Physics, vol. 73, no. 3, pp. 1205–1213, 1993.

[6]K. Uchida et al., “Physical Mechanisms of Electron Mobility

Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime,” in IEDM Technical Digest, Washington, DC, USA, December 2005.

[7]W.-C. Ng and M. Pfeiffer, “Generalized Photon Recycling Theory for 2D and 3D LED Simulation in Sentaurus Device,” in 6th International Conference on Numerical Simulation of Optoelectronic Devices (NUSOD-06), Singapore, pp. 127–128, September 2006.

[8]W.-C. Ng and G. Létay, “A Generalized 2D and 3D White LED Device Simulator Integrating Photon Recycling and Luminescent Spectral Conversion Effects,” in Proceedings of SPIE, LightEmitting Diodes: Research, Manufacturing, and Applications XI,

vol. 6486, February 2007.

and:

By default, VFSUB, VFIPAIR, and VFVPAIR are set to zero. Figure 3 shows the simulation results for the equilibrium solid-solubility limits of boron compared to theoretical calculations from Sadigh et al. [2]. Figure 4 applies the new model to boron diffusion in a structure

composed of a thin (50 nm) Si0.8Ge0.2 layer grown on a silicon substrate. In both cases,

VFSUB is set to –10 A3. The pressure gradient at the boundary between the strained epitaxial layerandthebulksiliconpreventsboronatoms from diffusing downwards, which results in a segregation-like effect.

300

Data from Sadigh et al. [2]

Figure 3. Simulation results versus Sadigh et al. [2] results.

Figure 4. Application of the model to the SiGe/ silicon layer.

Facet Formation during Epitaxial Growth

In silicon technology, faceting is observed in epitaxy, especially in selective epitaxial growth. In elevated source/drains, facets must be taken into account during post-epi processing such as implantation, silicidation, and embedded SiGe stressors. Faceting is a complicated mechanism that depends on both the topology of the structure and material properties, as well as process conditions. Version A-2007.12 implements a faceting model based on a geometric approach whereby the epitaxial growth rate is orientation dependent.

Themodeliscontrolledbytwonewparameters added to the MATERIAL statement: EPI. RATE and EPI.ANGL. EPI.RATE is an array of values specifying the relative growth rate to the given thickness in the EPITAXY statement for each angle in EPI.ANGL. Angles must cover the range from 0° to 90°.

To specify a constant growth rate, as for polysilicon relative to the silicon, a single value may be given for EPI.RATE with no value for EPI.ANGL. To illustrate the use of the new faceting model, the result of an experiment by Dutartre et al. [3] is simulated. The syntax is:

MATERIAL Si EPI.ANGL="0,20.24,

+25.24,30.24,90"

+EPI.RATE="1, 1, 0.51, 1, 1"

SiO2

500 nm

Figure 5. Simulated cross section of facet formation during selective epitaxial growth.

Figure 5 shows the simulated cross section.

Different growth rates for silicon and polysilicon can also be defined in order to control the boundary angle between silicon and polysilicon regions, as shown in Figure 6.

0.4

0.6

0.8

1

-0.2

0

0.4

0.6

0.8

1

Figure 6. Simulation of two boundary angles at silicon–polysilicon interface: top figure uses EPI.RATE=1.1 and bottom figure uses EPI.RATE=0.9.

Region Generation Based on Fields

It is sometimes convenient to define a new material from an existing material where an impurity field exceeds a threshold value. A common example is the creation of an oxide region embedded in silicon, where the oxygen concentration exceeds a certain value, as in buried oxide SOI processes following oxygen implantation. This capability is particularly useful in nonplanar structures as seen in Figure 7.

-0.1

0

0.1 Silicon

0.2

0.3

0.4

0.5

-0.1

0

0.1

Oxide

0.2

Silicon

0.3

0.4

0.5

Figure 7. Formation of buried oxide region. Following oxygen implantation into silicon region (top), the high oxygen concentration region is converted to oxide (bottom).

Improving Moving Boundary Shape

At moving interfaces during oxidation or silicidation,theconversionofmaterialfromone type to another (for example, from Ti to TiSi2) causes some mesh elements to be completely consumed. In a thin layer of material, this may require changing the material type of a disappearing element (for example, TI) to match that of a neighboring element (TiSi2 or ambient). Unless all elements are converted to the same material, small irregularities in the interface between the two remaining materials can appear. In Version A-2007.12, this process has been improved to avoid these irregularities in most cases. The new algorithm is enabled by the FIX.FLAT parameter in the METHOD statement. By default, FIX.FLAT is switched on.

When the growth reaction occurs near the location where more than two material regions meet (for example, Ti, TiSi2, and ambient), single-mesh material regions can form. Such a region formed by a single triangle slows down the simulation and roughens the boundary shape.

Earlier versions removed such triangles when the region was smaller than 1 x 10–15 cm2.

Now, the ratio of the minimum area to this limit (1 x 10–15 cm2) is parameterized so you can control the size of a single-element triangular region to be removed. Controlled by the R.MIN.AR parameter in the METHOD statement, the single-element region is

removed when its area is smaller than R.MIN.AR.1 x 10–15 cm2. The default value

of R.MIN.AR is 10.0.

C0 Initialization Updates

With the ACT.FULL activation model, the EQACT.A parameter in the METHOD statement forces the initial active concentration not to exceed its equilibrium concentration when ACT.NI has a positive value. In the ACT. FULL model, the total cluster concentration in the amorphous region is initialized as follows.

When ACT.NI = 0:

Ccl,total = max(C – ACT.AMOR, 0.0)

When ACT.NI > 0:

Ccl,total = max(C – min(ACT.AMOR, ACT.NI· ni ), 0.0) with !EQACT.A

Ccl,total = max(C – min(ACT.AMOR, ACT.NI· ni , Ca*), 0.0) with EQACT.A

By default, EQACT.A is switched off. To make the ACT.FULL model compatible with the ACT.TRAN model, EQACT.A must be switched on, and ACT.NI must be set to the same value as ACT.MIN.

Previously, a positive ACT.NI value with the ACT.FULL model limited the maximum active concentration during initialization and at the beginning of each diffusion step. This caused discontinuous activation at the diffusion step following the temperature ramp diffusion with slow clustering or declustering of precipitation (C0).

In Version A-2007.12, the C0.TRAN parameter in the METHOD statement forces C0 to update during the temperature ramp so that the minimum active concentration is always greater than ACT.NI multiplied by the intrinsic carrier concentration, which is compatible with the ACT.TRAN model.

When C0.TRAN is switched off (default), the ACT.NI-limited activation is applied only to the C0 initialization following an implant. To make it compatible with Version Z-2007.03 for ACT.FULL with positive ACT.NI, use:

OPTION V.COMPAT=2007.03 METHOD !C0.TRAN

Usability and Numerics Enhancements

There are several usability and numerics enhancements. When etching an exposed layer, specifying the etching thickness as the exact layer thickness can result in very

thin slivers or numeric round-off errors, eventually causing unexpected simulation results. To avoid such round-off errors, it was strongly recommended to overetch slightly. However, when the layer to be etched is formed by several nonconsecutive deposit process steps, it is not easy to calculate the accumulated thickness, especially in nonuniform structures. While the improved etching algorithm in Version A-2007.12 reduces the likelihood of problems due to round-off error, it is still recommended that a realistic amount of overetching be specified.

The default model for numerics, M.AUTO, dynamically allocates the necessary memory for the optimal preconditioner. For large simulations solving many coupled equations, the memory size to be allocated can exceed the allowable maximum value, leading to the program crashing.

To avoid this, the parameter MAX.ALLO in the METHOD statement defines the maximum amount of memory to be allocated for the solution matrix when M.AUTO is used. A value of zero implies no limit and is the default. On a 32-bit machine, no memory allocation may exceed 231 bytes. A value such as METHOD MAX.ALLO=1.8E9 prevents the allocation of memory for the solution matrix from exceeding this limit, while leaving space for other data structures required by the tool.

Enhancements in Medici

Enhancements in Medici (2D) Version A 2007.12 include new options for mobility, band-to-band tunneling, and program control.

New Mobility Options

Medici now includes a mobility option that accounts for high-k dielectric mobility degradation. The model implemented in Medici is the same as that implemented in Sentaurus Device (see High-k Mobility Degradation on page 3). The model provides

mobility degradation components accounting for remote Coulomb scattering (RCS) and remote phonon scattering (RPS).

Inaddition,theLucentmobilitymodelhasbeen enhanced to include a doping dependency for some of the model parameters. This option can be used to obtain better agreement with experimental measurements for devices with

high doping levels in the channel (for example,

Ntotal > 8 x 1017 cm–3).

Tunneling Factor for Band-to-Band Tunneling

Medici now allows an option for including a tunneling factor, Dtunnel, that multiplies the generation rate when using the band-to- band tunneling model. This factor takes into account the probability of having a filled state to tunnel from, and an empty state to tunnel to. Inclusion of this factor can help reduce or eliminate large band-to-band tunneling currents that are sometimes observed at zero bias. Including this factor also allows for the possibility of forward-bias Esaki tunneling.

SYSTEM Statement

Medici provides a SYSTEM statement that can be used to execute a UNIX shell command from within the input file specification. This can be used, for example, to copy files or to remove temporary files created during the simulation, to issue commands to start other simulations, and to start other tools for postprocessing results.

References

[1] R. Wittmann, A. Hössinger, and S. Selberherr, “Monte Carlo Simulation of Ion Implantation in Silicon-Germanium Alloys,” in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Munich, Germany, pp. 169– 172, September 2004.

[2]B. Sadigh et al., “Large enhancement of boron solubility in silicon due to biaxial stress,” Applied Physics Letters, vol. 80, no. 25,

pp.4738–4740, 2002.

[3]D. Dutartre, A. Talbot, and N. Loubet, “Facet Propagation in Si and SiGe Epitaxy or Etching,” ECS Transactions, vol. 3, no. 7,

pp.473–487, 2006.

by Dr. Francis Benistant

Introduction

Over the past several years, TCAD has benefited from the spread of the Linux operating system in industry and from advances in parallel-computing algorithms. Simulations can run on x86 (32-bit and 64-bit) architectures, with single-core or multicore CPUs, and large-memory capacity, making large-scale computer-intensive TCAD simulations practical for process integration (PI) and device teams in semiconductor technology development or customization.

A major characteristic of a semiconductor foundry is the large technology portfolio, as well as transistor types (from high speed to low power) within a given technology node. The development of new technologies and the customization of existing technologies for fabless semiconductor companies must be quick and cost-effective for the foundry to be profitable. The main factor for profitability is the number of wafers used during the development or customization cycle, which can be reduced with a centralized TCAD organization supporting the PI and device teams.

In the past, the use of TCAD was limited by very long simulation times and by a lack of proven calibration methodologies to ensure accurate results. Between 1998 and 2002, and mainly through the European projects RAPID and FRENDTECH, much work has been accomplished in modeling damage evolution after implantation and during thermal

annealing or diffusion. Insight into the complex physics of damage evolution has been aided by the development of kinetic Monte Carlo (KMC) programs, such as the one developed at the University of Valladolid in Spain.

With KMC, it is possible to study in detail the growth and dissolution of silicon–interstitial clusters, {311} defects, and other extended defects that have a primary impact on the available concentrations of interstitial and vacancy point defects that affect transientenhanced diffusion. While much work remains to be done in calibrating the many fundamental parameters used in KMC programs, the understanding afforded so far by these programs has played a key role in devising new process calibration methodologies for continuum process simulators, which have lead to more predictive simulations over a larger range of experimental conditions.

Therefore, the experience of Chartered Semiconductor is that computational efficiency, resulting from better algorithms and hardware, and improved process calibration methodologies have contributed to the increasingly vital role of TCAD in Chartered Semiconductor. Yet further gains in the use of TCAD can be made by considering an appropriate form of TCAD organization.

TCAD Organization for Semiconductor Manufacturing Support

The advantages and disadvantages of two distinct types of TCAD organization are considered:InanatomizedTCADorganization,

TCAD engineers are embedded in the various PI and device teams. In a centralized TCAD organization, the TCAD engineers belong to the same team with its own hierarchical structure.

The main advantage of an atomized TCAD organization is that TCAD resources are allocated to the PI and device teams, allowing the TCAD resources – engineering expertise, computer hardware, licenses, and so on – to be fine-tuned to the specific needs of these teams.

The main disadvantage of this approach is the lack of synergy between TCAD engineers and the potential for inefficient use of TCAD resources across the company. Typically, TCAD engineers embedded in PI or device teams have other engineering functions, during which time the TCAD licenses and computer hardware are idle.

Moreover, in a loosely connected network of TCAD engineers, it becomes more difficult to build and maintain consistent and efficient calibration methodologies across multiple processmodulesandtechnologies.Inextreme cases, this lack of attention to calibration methodology may decrease the quality of the simulations, resulting in a loss of confidence in the ability of TCAD to guide split-lot process conditions.

The second main disadvantage of an atomized TCAD organization is the split of computer and software resources. The split is necessary to ensure quick delivery of results; however, it

does not allow unused resources to be tapped by TCAD engineers in other teams. To partially compensateforthesedeficiencies,sometimes a small centralized TCAD team is formed to assist with calibration methodologies, tool evaluation, and so on.

In Chartered Semiconductor, a centralized TCAD team has proven to be the most efficient way to manage TCAD resources, ensuring higher quality of results and more efficient use of computer hardware and licenses. The goal of this centralized unit is to:

•Develop TCAD methodologies.

•Evaluate different TCAD tools.

•Integratethesetoolsintoaunifiedsimulation flow.

•Provide support to the PI and device teams.

The key point of having a centralized TCAD team is the synergy between the different team members: quick exchange of information about calibration, simulation approaches, and bug tracking. Yet, a centralized TCAD organization could continually slide into more abstract tasks and lose sight of the needs of its primary customer—the PI teams.

To prevent this, it is important that management, when creating a centralized TCAD team, clearly defines its mission, that is, to support the PI and device teams with accurate simulation results.