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Contents

6

Features and Enhancements in TSUPREM-4

Version Z-2007.03

7

Enhancements in Medici and Davinci

Version Z-2007.03

7

Introduction to Extreme Ultraviolet (EUV) Lithography Simulation

Latest Edition

It is my pleasure to inform you that recently Dr. Wolfgang Fichtner was promoted to Senior Vice President and GM of the

Dr. Fichtner now also manages the DFM, physical verification, and manufacturing yield management businesses. From this edition, I take over Dr. Fichtner’s editorial responsibility for TCAD News.

I am pleased to announce that Version Z 2007.03 of Sentaurus and Taurus is here. The Sentaurus tools continue to build on the inexorable momentum achieved to date with important new features ranging from laser annealing and anisotropic diffusion in process simulation to stress-dependent MonteCarloandanisotropicdensity-gradient quantum corrections in device simulation. Such detailed models are a testament to the complexity of modern semiconductor technologies and, increasingly, a requirement for our customers to achieve their development objectives.

With the continual shrinking of critical feature sizes and the emergence of atomistic effects, our advanced user community will now be able to import statistical doping distributions from Sentaurus Process Kinetic Monte Carlo into Sentaurus Device for electrical analysis of random-dopant fluctuation effects. Beyond advanced models, there are two significant tool integration efforts: the seamless integration of Sentaurus Process with Sentaurus Structure Editor and Sentaurus Topography, providing users with greater flexibility in incorporating 3D modeling and advanced deposition and etching simulation into their TCAD flows.

Our Taurus customers will find two articles highlighting the new developments in TSUPREM-4 and Medici. In addition, we expand our coverage in lithography with an article on EUV lithography challenges and simulation. I trust you will enjoy reading TCAD News, and we look forward to your comments and suggestions.

With best regards,

Terry Ma

Group Director, TCAD Business Unit

The diffusion of the boron extension implant is most critically affected by the strain profile at the edges of the SiGe pockets under the gate. In this region, the pockets on the source and drain side compress the channel in the longitudinal or x-direction. In the y-direction, the silicon stretches at the edges of the SiGe pockets under the gate.

Figure 4 shows simulation results for a 90-nm gate length PMOS device based on simulations with a user-defined straindependent anisotropic diffusion model similar to the one proposed by Windl et al. [3]. The model used here assumes that the diffusivity

Dx/y in the x- and y-direction is enhanced or retarded by a strain-dependent factor

Fx/y (σ): Dx/y = D0 Fx/y(σ), where D0 is the (isotropic) diffusivity in relaxed silicon, and

Fx/y = exp(Ea σxx/yy/kT), where Ea is an effective activation energy.

According to [3], a realistic value for the effective activation energy is Ea=3.75 eV. The location of the p-n junction for this activation energy is the blue line in Figure 4. As a reference, the p-n junction for isotropic diffusion (Ea=0) is the green line. There is a strain-induced p-n junction shift of 2 nm, resulting in an approximately 5% change in the effective gate length.

Figure 4. Final p-n junction positions for five different effective activation energies Ea of the strain-dependent anisotropic diffusivities:

(red) Ea=–20 eV, (orange) Ea=–3.75 eV, (green) Ea=0 eV, (blue) Ea=+3.75 eV, and (purple) Ea=+20 eV. According to [3], the actual value of Ea is 3.75 eV. Other values are shown to illustrate the effects of strain-dependent anisotropic diffusion only.

For other dopants, the activation energy may have different values or a different sign in the exponent of the enhancement factor. For example, vacancy-mediated diffusers may diffuse faster under compressive strain. To investigate the sensitivity of the p-n junction location on the value and sign of the effective activation energy, results for Ea=–3.75 eV (orange) and Ea=±20 eV (red and purple) are included in Figure 4.

This illustrates that the strain induced by the SiGe pockets in PMOS devices can help limit boron diffusion from the source/drain extensions into the channel, and that the newly added anisotropic diffusion model in Sentaurus Process Version Z-2007.03 is well suited to simulate and study the effects of general strain distribution on the final dopant profiles in strain-engineered MOSFETs.

Multistep Deposition with Stress Relaxation

Strained capping layers are widely used in modern CMOS technology for enhancing device performance. In the dual-stress liner approach, tensile and compressive capping layers are applied to NMOS and PMOS transistors, respectively. The pervasiveness of the technique and its technological significance warrant a detailed analysis of how to model accurately the stresses induced by these layers. Recently, Loiko et al. [4] reported that a more accurate simulation of stress relaxation during stressor film deposition is achieved if the deposition is

KMC reads the whole stress tensor from Sentaurus Process for each different KMC internal element. Before using the stress tensor, it is diagonalized, and the principal stress values and coordinate system are obtained. At this point, three different migration rates are computed, one for each of the different principal axes. This model defines two new parameters, Vpar and Vort, which account for the activation volume parallel and perpendicular to the stress.

The formation energies of point defects and impurity-paired point defects are corrected by adding ∆Ef = PVf , where KMC computes the hydrostatic pressure P as P = (σxx + σyy + σzz)/3. Vf is the parameter to account for the activation volume for formation. These corrections are used when emitting point defects at the interfaces between different materials, to update the impurity-paired point defects breakup rates, and to bias the diffusion between two elements with different stress. This means that the interface will emit more particles in regions where the stress lowers the formation energy.

The activation energy used to break up impurity-paired point defects without stress has two components. One accounts for the binding energy, and the other accounts for the migration barrier needed to pull away the point defect. Both contributions are corrected to include stress effects.

Finally, there are different formation energies betweendifferentKMCelementswithdifferent stresses. Particles go to those regions where they are more stable. This is simulated by rejecting some jumps when a particle is trying to enter an unstable region. This probability is computed using the formation and migration corrections due to stress. Figure 10 shows the same FET device after the last annealing. The differences between the figures are the external applied stress: (top) has no stress and (bottom) has been simulated under a constantstress(1 GPa)thatenhancesarsenic diffusion. This enhancement is clearly shown for the drain, source, and in the channel, and contains few isolated active islands that may generate an unreliable device.

Other improvements include a more accurate calibration for KMC. Using the command AdvancedCalibration after

SetAtomistic loads the Advanced Calibration parameters for KMC. A new reaction has been added to form and dissolve impurity clusters. For a given impurity cluster (for example, boron–interstitial clusters), the reaction B– + B0i ↔B2I + e– is included. The charge effects are included in the reactions. The extra electron on the right side of the equation is recombined by the system.

Furthermore, KMC computes different recrystallization rates for each amorphous element. These rates depend on the local morphology of the amorphous element, which is accounted for through the number of neighboringelementsthatarealsoamorphous. Consequently, very thin ‘peninsulas’ of amorphous materials embedded in a crystalline region recrystallize faster, since they are less stable than elements surrounded by amorphous materials.

The KMC log file now offers detailed atomistic information about activation levels, cluster distribution, interaction between particles, and events performed by the simulation.

Sentaurus Process allows for the averaging of multiple KMC statistically equivalent runs to reduce the statistical noise. When running the KMC simulation project under Sentaurus Workbench, these multiple runs can be executed in parallel.

In Figure 11, the black lines show experimental resultsofa1x1014,30 keVPimplantfollowed bya15-minute,800°Cannealing(blueline)[6]. Thegreenandredlinesinthetopfigurearethe resultofaKMCsimulationwiththedimensions 750 x 40 x 40 nm3. A less noisy simulation

X [µm]

0.1

X [µm]

Figure 10. Concentration of active arsenic under spacer and gate of a FET device; the stress applied (bottom figure) enhances As diffusivity.

can be obtained using the dimensions 750 x 200 x 160 nm3, that is, 20 times bigger. Unfortunately, such a simulation takes almost 20 times longer. A solution is to run 20 parallel simulations with the original size (40 x 40) and to average the results at the end, as shown in the bottom figure. The results are less noisy but still comparable to the large simulation, except that, given a 20-CPU cluster, the parallel solution is obtained approximately 20 times faster (45 minutes) than running the 750 x 200 x 160 nm3 simulation (14 hours 45 minutes).

1020 Sims_as_imp

Sims_diffuse

KMC_as_imp

KMC_diffuse

Figure 11. Experimental results versus (top) one 750 x 40 x 40 nm3 KMC simulation and (bottom) the average of 20 750 x 40 x 40 nm3

KMC simulations; 1 x 1014, 30 keV P implant and 15-minute annealing at 800°C.

From Kinetic Monte Carlo Process Simulations to Device Simulation with Sentaurus Device

KMC simulations are gaining popularity as an alternative to continuum process simulations because highly sophisticated KMC models provide better predictability for nanometer transistor simulations. However, the results of a KMC simulation, which are the locations of discrete dopants (see Figure 12), are not

directlyusableinacontinuumdevicesimulator, such as Sentaurus Device. The full Coulombic potential associated with a discrete dopant is singular and can be problematic if included directly in a drift-diffusion device simulator such as Sentaurus Device. This issue is addressed by using a method that separates the potential into a short-range term and longrange term [7].

For inclusion in Sentaurus Device, only the long-range portion is used. (The short-range portion is responsible for short-range impurity scattering and is already implicitly included in the current continuity equations.)

Specifically, a localized charge distribution that represents the long-range contribution to the Coulombic potential is associated with each discrete dopant position. The union of these distributions for all discrete dopants is then used as the doping profile for device simulation with Sentaurus Device.

To illustrate this, Figure 12 shows the KMC simulation results for a 3D NMOS transistor. The blue points indicate dopant locations at the end of the KMC simulation. This structure with its discrete dopant information is then passed to Sentaurus Mesh for device mesh generation and computation of the full 3D doping profile using the long-range portion of the charge densities associated with the discrete dopants.

Figure 12. NMOS structure with discrete dopants resulting from a KMC simulation. Blue points indicate location of dopants (both n-type and p-type) at end of KMC simulation; physical gate length of device is 30 nm.

This structure is now ready for simulations with Sentaurus Device. Figure 13 shows the equilibrium electron concentration computed using the doping profile obtained from the results of the KMC process simulation.

Figure 13. Equilibrium electron concentration computed using doping profile obtained from results of a KMC process simulation.

Figure 14 shows three Id–Vg performance curves simulated by Sentaurus Device. Each curve corresponds to a KMC simulation using a different random number seed and, therefore, represents the equivalent of die-to-die variation due to random-doping fluctuations. The three individual devices have macroscopically identical geometries and were simulated assuming identical processing conditions, but they are microscopically different due to fluctuations of dopant from

device to device. Statistically, both the number ofdopantsandtheirlocationscanvaryfromone device to another. Figure 14 demonstrates the variations of device performance associated with such a phenomenon.

Gate Voltage [V]

Figure 14. Id–Vg performance curves of three NMOS devices (all devices are 50 nm wide).

New Mesh Parameterization Option in Sentaurus Process

Sentaurus Process Version Z-2007.03 introduces a new meshing algorithm called UseLines, which is optimized specifically for simulations of a set of devices with parameterized geometries.

An application example for this new feature is the simulation of the threshold voltage roll-off behavior of a given technology. For this task, a set of CMOS structures is created using the same process flow, but with different gate lengths.

ThedefaultalgorithmoftheSentaurusProcess meshing engine MGOALS first automatically identifies certain features in the geometry and then subdivides the structure with mesh lines until all user-specified mesh-spacing requirements are fulfilled. Consequently, the location of all mesh nodes along the surface may be different in two devices when, for example, the gate length is changed.

The UseLines feature allows for usercontrolled partitioning of the structure. By introducing a dividing line, for example near the gate edge, the bisectional algorithm operates (initially) separately in the gate area and source/drain area, ensuring that the mesh node locations in the source/drain areas remain mostly unchanged, even if the gate length is different.

Figure 15 illustrates this behavior for a simple rectangular structure. The two upper panels show the mesh in a rectangular region with a width of 1 unit. Eight mesh lines in the x- direction are uniformly distributed resulting in mesh spacing of 1/8 units. In the lower panels, the rectangle is stretched to a length of 1.207 units. Without activating the UseLines feature, MGOALS again creates eight uniformly distributed mesh lines in the x-direction, resulting in a mesh spacing of approximately 0.15 units. Note that all mesh node locations are different between the upper-left and lower-left panels.

In the lower-right panel, the UseLines feature is activated and a line at x=0 is introduced (shown as a thick blue line). In this case, the region between x=–0.5 and x=0 is not affected by the stretching and, in this region, the locations of all meshing nodes are preserved.

If a relatively coarse mesh is used, the numeric accuracy of the simulation results may be sensitive to the location of the mesh nodes, leading to fluctuations large enough to overshadow the trends to be investigated. Even with the default algorithm, the fluctuation level can be minimized by resolving the device more adequately; however, this mesh adjustment process may be time-consuming and tedious.

Figure 18. Plot of doping concentration and mesh in n-LDMOS device; only lightly doped drift region and channel area are shown.

reflection, the following operations are added: sweep along the normal to the submesh plane, sweep along a vector, sweep along a polygon path, and rotation around an axis placed at a certain point with arbitrary direction.

These operations allow the creation of more general 3D devices than previously possible. They also complement similar capabilities in Sentaurus Structure Editor.

Anisotropic Density Gradient for Modeling Quantum-Mechanical Effects

As the miniaturization of devices reaches nanoscale levels, the proper modeling of increasingly prominent quantum effects in thin layers becomes paramount to the prediction of electronic devices’electrical behavior using multidimensional simulations. Progressively thinner gate insulators have led to significant quantum confinement in the channel of field effect transistors (FETs) as well as to direct tunneling of carriers across the insulator stack. Moreover, off-state currents must be accurately modeled as the gate length also shrinks.

The density gradient (DG) macroscopic approach to modeling quantum-mechanical phenomena in electronic devices has been frequently used due to its easy adaptation to existing drift-diffusion and hydrodynamic transport formulation employed in simulation tools such as Sentaurus Device, as well as to its ability to account for three-dimensional effects. Although DG represents a simple approximation to quantum-mechanical corrections, it has been shown to describe quantum confinement accurately enough when compared with a more rigorous, 1D Poisson–Schrödinger (PS) approach also available in Sentaurus Device. DG has also been applied to the simulation of quantummechanical tunneling across gate insulators and source-to-drain in ultrashort FETs.

Until now, DG implementations in Sentaurus Device used a scalar coefficient for gauging the DG dependency. In Sentaurus Device, this coefficient includes the ratio of a fitting factor, g, and the density-of-states effective mass, m. It can be shown from theoretical derivations that g = Cm/mz where mz represents the quantization mass and C is a coefficient that depends on state occupancy. In the hightemperature limit, with broad state occupancy C → 1, while for the low-temperature limit or if one state dominates, C → 3. However, individual silicon conduction band valleys are anisotropic and, therefore, different quantization length scales result for different spatial directions whenever the valleys of the conduction band minima are occupied unevenly.

The newly implemented model in Sentaurus Device introduces a symmetric matrix α to the DG equation:

Λ = − 6hmγ ∆. √αn∆√n

wherenistheelectrondensity.Theeigenvalues of α provide the new multiplication fitting factors. For devices aligned to the main axes, α is diagonal with αxx, αyy, and αzz, which represent multiplication factors along the x-, y-, and z-axis, respectively.

The implemented extension allows for more accurate modeling of strained devices or structures where quantization along two perpendicular axes becomes important, as long as quantization for one of those axes is predominant. That is the case for ultrashort, double-gate FETs or FinFETs that are natural candidates for scaling CMOS technology beyond 20 nm in gate length. Quantum confinement effects, already significant in bulk metal–oxide–semiconductor (MOS) devices, are exacerbated in thin fins.

Simulations were performed with Sentaurus Device to investigate the need for anisotropy in the DG model. Initially, a 2D double-gate structure was created with Sentaurus Structure Editor. The direction perpendicular to the silicon–oxide interfaces was assumed to be oriented along [010].

The channel silicon slab was fixed at 8 nm, doped with NA = 4 × 1018 cm–3, and 1.6-nm

thick gate oxides were placed on the top and bottom. The gate electrodes were assumed to have a mid-bandgap workfunction. This can be thought of as being the channel region of a long and tall FinFET.

Capturing proper penetration of carrier distribution in the source/channel and drain/ channel junction barriers determines correct potential profiles and, therefore, for example, accurate thermionic emission that normally contributes significantly to leakage current. Therefore, it is important to model the carrier density penetration into the channel barrier correctly.

A second simple, 1D, silicon planar diode structure was created with Sentaurus StructureEditor,withND =2×1020 cm–3 and NA = 4 × 1018 cm–3 resembling the source/ channel junction in a [100] channel–oriented FinFET.

Figure 19 compares electron-density profiles penetrating the junction potential barrier using the 1D PS and DG models. The isotropic DG model produces a fairly good match to the profile predicted by the more rigorous 1D PS approach. The electron-density profile from a classical simulation is plotted also, evidencing the need for multidimensional quantum corrections in ultrashort devices.

PS (default)

DG (default, isotropic)

Classical

Distance [nm]

Figure 19. Comparison of electron-density profiles penetrating the junction potential barrier predicted by 1D PS model (black squares) and DG model

with αxx=1 (blue line). The classical electron density is shown as a reference.

The good match produced by the isotropic DG model may be surprising at first, since it would be expected that the quantum penetration scale should be governed by a quantization mass, mx , with contributions from all six valleys, including four valleys where the quantization mass is the small transversal mass, mt . However, the wide occupation of all six conduction band valleys also implies that C → 1 and, therefore, a γ three times smaller than the default value should be used. Since γ and mx enter the DG equation as the ratio γ/mx , the reduction of mx and γ together keeps the ratio approximately constant.

The scenario changes in ultrathin layers or in strained silicon where the occupation of energy band extremes does not average out, since the minima or maxima are split. Considering that the band extremes in silicon are anisotropic, uneven occupation dictates the use of anisotropic DG coefficients. If significant splitting of band minima occurs due to quantum confinement in ultrathin layers, for example in a [100]-oriented FinFET, the quantization mass for the confinement effect along [010] will be dominated by ml , while the carrier density penetration parallel to the channel–insulator interface will be governed by mt .

New simulations were run with the PS model with a modified ladder to emulate significant band splitting, with the valleys along [010] dominating occupancy.

This allows us to estimate the upper limit for the degree of anisotropy required in the DG model. Figure 20 compares electron-density profiles penetrating the same junction barrier as that of Figure 19. The black squares represent the result from the PS simulation with default parameters as a reference.

Distance [nm]

Figure 20. Comparison of electron-density profiles penetrating the junction potential barrier predicted by 1D PS with default parameters (black squares), with the 1D PS and a modified ladder to emulate extreme quantization in a FinFET (red circles), and DG model with αxx = 3 (blue line).

The red-line profile was obtained with a single ladder formed by the valleys along the [010] direction, with mt as the quantization mass. An αxx = 3.0 in the DG model is required to obtain a reasonable match to the simulation with PS and the modified ladder. Subsequent simulations computed Id–Vd characteristics for a 2D double-gate MOS device in its offstate, that is, Vgs = 0 V.

It was assumed that the channel was oriented along the [100] direction and gates were parallel to the [010] direction. All simulations included the DG model with hydrodynamic transport equations.

The intention was to assess the importance of the anisotropic coefficients in the leakage current. Simulations were run for the isotropic case and for αyy = 1.0 and αxx = 3.0. In the latter, we set αyy = 1.0 since quantization in the direction perpendicular to the channel interfaces is dominated by the longitudinal mass, and we set αxx = 3.0 to match the PS simulation with the modified ladder for electron penetration into the channel barrier. The source and drain were doped

source/drain junctions resulting in an effective channel length approximately 1 nm smaller than the Lg = 12 nm gate length.

Identical oxides and gate electrode characteristics as in the initial double-gate structure were used in the full device. Figure 21 plots Id versus Vd for Vgs = 0 V and forαxx = 1.0and3.0,aswellasthesamecurve from a simulation without quantum correction. A significant increase in the leakage current is predicted with the quantum correction using

DG and increasing values for αxx. The simulated leakage current is composed of increases in both thermionic emission and tunneling components.

Sentaurus Device provides a fitting parameter

that can be thought of as the mobility, µTunnel, applied only to excess electrons due to

quantum-mechanical barrier penetration compared to the classical carrier density.

Although µTunnel was not calibrated here, it can be calibrated by comparing simulations

with DG to others including more accurate approaches for computing tunneling currents, also available in Sentaurus Device, where tunneling probabilities are assessed using the semiclassical Wentzel–Kramers–Brillouin (WKB) approximation or from the solution of the Schrödinger equation.

250

DG (αxx = 3.0)

200 DG (αxx = 1.0)

Classical

Vd [V]

Figure 21. Id versus Vd curves for αyy = 1.0 and

two different values of αxx: 1.0 and 3.0. The same simulation without quantum correction using DG is shown as a reference.

Modeling Spatially Nonuniform Stress Effects with Sentaurus Device Monte Carlo

Stress engineering in semiconductor devices offers a low-cost technique to improve their characteristics and is widely used in modern MOSFET technology.

The stress fields in semiconductor devices are typically spatially nonuniform. However, most Monte Carlo simulation tools so far were limited to account only for spatially uniform stress. With Sentaurus Device Monte Carlo Version Z-2007.03, this limitation is lifted.

Thisnewfeaturesupports<100>-typeuniaxial spatially nonuniform stress and is based on localstress-dependentinterpolationsbetween electronic band structures calculated for different stress levels.

This simulator is fully integrated in the Sentaurus tool suite. The seamless interface of Sentaurus MOCA with other tools offers users the possibility to use the simulation flow described below.

The processing of the device structure with resulting dopings and stress fields is simulated using Sentaurus Process. Then, Sentaurus Structure Editor and Sentaurus Mesh remesh the structure as required by Sentaurus MOCA. Finally, Sentaurus MOCA calculates the electrical current in the device for a given bias.

Sentaurus MOCA requires a tensor mesh; therefore, the nonrectangular and nonplanar regions of the structure are automatically transformed into a Manhattan-type geometry. This structure is read by Sentaurus MOCA.

The ensemble Monte Carlo simulation begins with a randomly chosen initial state. The calculationevolvestoaself-consistentsteady- state solution for the given bias conditions. Figure 22 depicts this time evolution of the drain current for different uniaxial stress fields applied along the channel at the same gate and drain biases of 1.25 V. One of the respective stress fields is shown in Figure 23. The simulation shows that tensile stress along the channel of the NMOSFET increases the electron mobility and the drain current.

TSUPREM-4 Version Z-2007.03 includes significant new models for simulating dopant-vacancy clusters, the effect of stress on dopant-defect pair diffusion, and gradient-doped epitaxy and deposition. Other enhancements include increased flexibility in usingimplantdamagemodelsandininitializing variables in the User-Specified Equation Interface (USEIT). Usability enhancements include automatic tuning for optimal selection of numeric models and automatic save at abnormal stops.

Dopant-Vacancy Clustering: The Importance of Dopant-Defect Clusters

To achieve the stringent ultrashallow junction depth and low sheet resistance requirements of source and drain extensions (SDEs) in advanced CMOS technologies, process engineers have increasingly resorted to low thermal budget processing techniques. With these techniques, characterized by short-time transients and non-equilibrium behavior, clustering phenomena have become critical in simulating both dopant diffusion and activation. With respect to dopant-defect clustering, TSUPREM-4 previously allowed for the formation and evolution of dopantinterstitial clusters. With this release, dopantvacancy clusters can now be treated as well.

The technological importance of dopantvacancy clusters is well illustrated in the case of arsenic. Widely used in SDE regions in CMOS and emitter regions in bipolar processes, arsenic can achieve high doping concentrations up to about 1 x 1021 cm–3. Yet during subsequent thermal processing, substantial deactivation has been observed, even at temperatures as low as 400°C [1].

The deactivation mechanism has been linked to the formation of arsenic-vacancy clusters. Density functional theory (DFT) studies have pointed to several AsnVm clusters as energetically favorable in view of low formation energies [2]. Other researchers have shown that such clusters can trap a considerable number of conduction band electrons, thereby providing a direct link to reduced activation [3]. From a dynamic point of view, low interstitial-vacancy recombination barriers suggest that over time these AsnVm clusters can dissolve into vacancy-free As clusters or As-interstitial complexes if the free interstitial concentration is sufficiently high to feed I–V recombination.

Modeling Full Dynamics of DopantDefect Clusters

TheTSUPREM-4modelsfordopantactivation comprise four physical mechanisms: solid solubility, dopant clustering, dopant-defect clusters, and small dopant-defect clusters. The activation model ACT.FULL accounts for all of these mechanisms; DDC.FULL goes further by also specifying the full dynamics of dopant-defect clustering.

Within the framework of ACT.FULL, this release extends the previous formulation by allowing the definition of dopant-vacancy clusters. There are built-in solutions for dopant-vacancy clusters containing boron, phosphorus, arsenic, and antimony. However, users can define new solutions, for example, carbon-vacancy clusters.

The DDC.FULL model has been extended to account for the reactions with vacancies or dopant-vacancy pairs. In an earlier version, the DDC.FULL model described the full dynamics of dopant-defect clustering associated with interstitials or dopant-interstitial pairs. The solution for new dopant-defect clusters is defined in the IMPURITY statement.

In earlier versions, the PAIR.EQU method for automatic transition from the five-stream to three-stream diffusion model (PD.FULL) was not allowed with the DDC.FULL model

because it required the solution of the dopantdefect pairing equations. This restriction has been removed, and PAIR.EQU can be used with the DDC.FULL model.

Since the reactions involved in full dynamic dopant-defect clustering include the reaction withdopant-defectpairs,thetransientbehavior of dopant-defect pairing must be coupled with the clustering equation. This is the reason why earlier versions required PD.5STR to simulate the DDC.FULL model. However, when the pairing reaction is much faster than the clustering reaction, local equilibrium for dopant-defect pairing can be assumed so as to simulate the DDC.FULL model with PD.FULL. In such a case, the point-defect equations are modified accordingly.

Pressure Dependence of Dopant-Defect Pair Migration and Formation Energies

The formation and migration energies of point defects and dopant-defect pairs are stress dependent, resulting in modifications to equilibrium concentrations and diffusivities. Previously, a model accounting for the stress dependence of point-defect intrinsic equilibrium concentration was introduced. In this release, the pressure dependence of dopant-defect pair formation and migration energy is now taken into account. The model for the migration energy is invoked by switching on the ST.DIFF parameter in the METHOD statement, whereas the formation energy model is invoked by switching on the ST.ALPHA parameter in the METHOD statement. When the ST.ALPHA parameter is switched on, the flux equation of the pair diffusion includes the flux due to spatial variation of the pressure:

The default value for VALPHAM and VALPHAN is zero. Setting them to negative values will result in diffusion enhancement under compressive stress.

Ion Implantation Enhancements

Following an amorphizing implant, the boundary between the amorphous and crystalline regions is determined by comparing the implant damage concentration to the MAX.DAM parameter value. After regrowth, the interstitial concentration in the regrowth region is set to its equilibrium value. This can lead to steep gradients in the interstitial concentration across the boundaries of the regrowth region. Since transient-enhanced diffusion is very sensitive to the overall interstitial concentration, TSUPREM-4 now offers a mechanism to increase mesh density near the boundary for increased accuracy. Unlike adaptive gridding involving other solution variables that use absolute and relative errors based on the solution values, the adaptive gridding for implantation damage is performed on a transformation of the damage profile of the form:

s = 1 + tanh[DAM.GRAD x In(D0/MAX.DAM)]

Then, mesh density is defined by the METHOD statement parameters ABS.ADAP and REL. ADAP, operating on s computed as above, and is switched on with the Boolean parameter DAM.ADAP. Figure 1 shows the usefulness

of this type of adaptive gridding for a 20 keV Ge PAI of dose 1 x 1015 cm–2. The fine

mesh surrounding the amorphous–crystalline boundary is essential to resolving the sharp point-defect gradients, resulting in more accurate simulations.

The analytic implant damage model in TSUPREM-4 is based on the work of Hobler and Selberherr [4]. The model approximates the damage profiles with combinations of

new parameter EQACTIVE in the IMPURITY statement defines the expression to calculate the equilibrium active concentration.

Within the USEIT framework, the INTERMED statement is often used since it allows for the simplification of complicated expressions. The expression defined in INTERMED is evaluated by call-by-reference, that is, it passes the memory address of the variable, not its actual value. The new parameter FIXNOW in the INTERMED statement snapshots and fixes the current value. Conversely, the new parameter UNFIXNOW reverts to the default condition. In addition, the new parameters SCOPE and

ENDSCOPE in the INTERMED statement specify the scope range within which the intermediates are applied. The scopes can be hierarchically nested.

Usability and Robustness

As simulation complexity increases, it becomes more critical for users to select optimal numeric parameters to save simulation time and improve convergence. However, with this added complexity comes the need to understand in detail the underlying numeric algorithms, a task well beyond process engineering and too specialized for most users. With this feature, parameter values are automaticallytunedasneeded,therebyfreeing users from the burdens of understanding the workings of numeric algorithms. Because this feature selects optimal settings, it typically saves simulation time. It is switched

on by default and is invoked with METHOD M.AUTO.

When a simulation stops abnormally because of a syntax error, an internal fatal error, or Ctrl+C, the AUTOSAVE mode stores the simulation result before the accidental event, so that users can continue the simulation after fixing the error without rerunning the whole simulation. The AUTOSAVE mode is specified in the OPTION statement and is switched off by default (OPTION AUTOSAVE=0). OPTION AUTOSAVE=1 saves the last state for CPUintensive processes such as DIFFUSE or

EPITAXY, while OPTION AUTOSAVE=2 also covers the steps STRUCTURE, ETCH,

DEPOSIT, DEVELOP, EXPOSE, PROFILE, and STRESS.

References

[1]M. Ramamoorthy and S. T. Pantelides, “Complex Dynamical Phenomena in Heavily Arsenic Doped Silicon,” Physical Review Letters, vol. 76, no. 25, pp. 4753–4756, 1996.

[2]S. A. Harrison, T. F. Edgar, and G. S. Hwang, “Interaction between interstitials and arsenic-vacancy complexes in crystalline silicon,” Applied Physics Letters, vol. 85, no. 21, pp. 4935–4937, 2004.

[3]D. C. Mueller, E. Alonso, and W. Fichtner, “Arsenic deactivation in Si: Electronic structure and charge states in vacancy-impurity clusters,” Physical Review B, vol. 68, no. 4, p. 045208, 2003.

[4]G. Hobler and S. Selberherr, “Two-Dimensional Modeling of Ion Implantation Induced Point Defects,” IEEE Transactions on Computer-Aided Design, vol. 7, no. 2, pp. 174–180, 1988.

[5]S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era, vol. 1, Sunset Beach, California: Lattice Press, 1986.

[6]U. S. Kim et al., “The Effect of Fluorine Additions to the Oxidation of Silicon,” Journal of the Electrochemical Society, vol. 137, no. 7, pp. 2291–2296, 1990.

The latest release of the device simulation programs Medici (2D) and Davinci (3D) provide new capabilities for improved accuracy, analysis, and ease of use.

Accurate Low-Level Currents

Medici and Davinci now use a technique for assembling current densities that can greatly improve low-level current accuracy. This is important to analyze accurately lowlevel current phenomena in semiconductor devices, for example, subthreshold currents in MOSFETs and low-level current gain in bipolar devices. The technique is called the quasiFermi Newton edge delta (QFNED) scheme andisusedbydefaultwhenobtainingsolutions with the Newton method. For situations where the technique is applicable, the improvement in both terminal current accuracy and in current densities within the device can be very

dramatic. It is not uncommon, for example, to resolve current levels as low as 10–25 A.

Figure 1 shows terminal current values versus gate voltage for a MOSFET. The I–V curves calculated with the QFNED technique show excellent resolution of the low-level currents, compared to the noisy I–V curves calculated when QFNED is not used. The smooth flowline plot reflects the accurate low-level current densities that are obtained when using the QFNED technique.

Mixed-Mode Enhancements

The mixed-mode capabilities of Medici and Davinci have been enhanced to support the UC Berkeley BSIM4 model. In addition, CALL files can now be used in circuit mode. CALL files allow input statements stored in a file to be loaded into another input file. This can be used, for example, to load files containing long lists of compact model parameters into a mixed-mode simulation input file.

Since 1965, progress in semiconductor technology has followed the now ubiquitously quoted Moore’s Law (“The number of transistors on a semiconductor chip doubles every two years.”). Since then, Moore’s Law has not only described the evolution in semiconductor technology, but also served as aroadmapforintegrateddevicemanufacturers and their production tool suppliers, both of which are reflected in the International Technology Roadmap for Semiconductors

(ITRS).

as photolithography must enable a 30% decrease in the size of the printed pattern with each generation or node. The minimum feature size in the underlying imaging process is governed by:

RES = k1 λ/NA

where RES is the half pitch of a lines/spaces pattern to be resolved, λ is the exposure wavelength of the light source, NA is the numerical aperture, and k1 is a factor that accounts for the complexity of the image formation process.

Smaller feature sizes can be imaged by either reducing the wavelength or increasing the numerical aperture (NA). Both approaches have been used. Over the years, the wavelength used by leading-edge lithography tools in production decreased from 365 nm (Hg arc lamp), to 248 nm (KrF excimer laser), and further to 193 nm (ArF excimer laser). New materials such as CaF2 were introduced to keep the transmission of the optical systems at an acceptable level and to compensate or correct birefringence and chromatic aberrations. Concurrently, the NA was increased above 0.9. In combination with other resolution enhancement techniques,

such as off-axis illumination or phase shift masks, (dry) optical lithography is being used in volume manufacturing of 65-nm node semiconductor devices.

However, the end of optical lithography has not yet been reached. Although the 157-nm exposure wavelength was not pursued, Sturtevant’s Law (“The end of optical lithography is always six to seven years away.”) was again proven with the introduction of immersion lithography. Immersion lithography is based on replacing the usual air gap between the bottom lens element of the projection lens and the resist surface on the wafer with a liquid medium of refractive index greater than one. The resolution is reduced by a factor equal to the refractive index of the liquid.

Currently, highly purified water is used as an immersion liquid, but research for resist and

glass-compatible liquids with even higher refractive indices is ongoing. In combination with advanced processing techniques, such as double patterning, it is likely that 193-nm immersion lithography will be used for the 32-nm node.

Nevertheless, optical lithography has real physical limitations. At shorter wavelengths, light is increasingly absorbed by almost any material, which makes the design of refractive optics practically impossible. One of the most promising next-generation lithography technologies is based on extreme ultraviolet (EUV) radiation with a wavelength of 13.5 nm. Sinceevenforhighlypolishedopticalelements the reflection efficiency is only of the order of a few percent for normal or oblique incidence, a multilayer structure is used to optimize reflectivity for a certain wavelength and angle of incidence.

Consequently, a mask is also represented by a reflective multilayer, on top of which an absorber layer defines the pattern to be imaged onto the resist-coated wafer. A plasma source provides the exposure light. All elements must be operated within an ultrahigh vacuum to minimize the reduction of intensity due to absorption. Each multilayer mirror, although optimized for reflection using interlayer interference, still reduces light intensity by about 30%. Residual surface roughness induces stray light (flare), impacting the contrast of the resulting image on the wafer level. The final image in EUV photoresist is created by the high-energy photons and secondary electron scattering.

The illumination of reflective masks and exposure of wafers under these conditions create enormous challenges for each component of the EUV lithography process. The research and development on EUV lithography is ongoing. Currently, the first prototype tools are being installed in research facilities with the goal of introducing the technology into volume manufacturing for nodes below 32 nm.

SOLID-EUV: Advanced Simulation Tool

The engineering challenges associated with the EUV process, limited access to first-generation exposure and processing equipment, and the high cost involved in running experiments, make lithography simulation a perfect tool to support process, equipment, and material development. Many benefits can be derived from exploring the technology with simulation before the actual equipment reaches the laboratory.

Simulation can be used in many areas of the image formation process. Since the light source is no longer monochromatic, broadband illumination in the EUV regime must be analyzed. Mirrors and masks (or mask blanks) may contain defects whose their impact on the final wafer image can be simulated. Moreover, the effect of stray light (or flare) due to the residual roughness of all reflective surfaces should be considered. Since the mask also represents a reflective surface, the direction of the incoming light deviates from normal incidence, requiring the solution of Maxwell’s equations to determine the electromagnetic field (EMF) distribution in the vicinity of the mask multilayer or absorber structure. As in optical lithography, the projection of the mask image (near field) onto the wafer and its imperfections can be described using aberrations.

As the image is transferred into photoresist, chemical reactions and the diffusion of resist, acid, or base components influence the final resist profile; while statistical effects impact characteristic parameters such as line edge roughness and line width variation.

Topographic Mask Simulation

The main challenge in EUV lithography simulation is the accurate treatment of reflection from the multilayer structure and the patterned absorbing mask layer. Standard electromagnetic field solvers are unsuitable due to long computational times.

SOLID-EUV was developed to address this simulation task very efficiently and offers two approachestocomputetheEMFdistributionin the vicinity of the mask. The modal waveguide method (WGM) solves Maxwell’s equations in Fourier space in the entire simulation domain, that is, the multilayer stack and the structured absorber layer, yielding a description of the

amplitude and phase of the EMF for each field component within layers of different materials. This method is very fast and accurate. It is extremely powerful when simulating 2D structures such as lines and spaces patterns, but also can be applied to more complex patterns such as contact hole arrays.

An alternative EMF solver is based on the finite-difference time-domain (FDTD) method, a classical numeric approach to compute the propagation of electromagnetic waves within ‘real space.’ To save computation time, the highly resonant behavior of the perfectly periodic multilayer structure is described analytically and then is coupled into the FDTD solver for the mask pattern, represented by the structured absorber layer. This composite approach enables the simulation of larger mask areas within a reasonable CPU time.

Figure 1 (top) shows a simplified schematic of an EUV mask. MoSi indicates the sandwich structure of the multilayer, constructed of individual layers of molybdenum (Mo) and silicon (Si) – a typical number is 40 – the thickness of which is optimized for maximum reflectivity at the exposure wavelength, for example, 13.5 nm. In this example, chromium (Cr) is used as an absorber material.

In contrast to traditional (refractive) optical exposure systems, EUV lithography must use an oblique angle of incidence due to its reflective nature – vertical or symmetric illumination is no longer possible. This creates asymmetries of images and critical dimension (CD) variations that differ in the x- and y-direction. Figure 1 (middle) shows the amplitude and Figure 1 (bottom) shows the phase of the EMF in the vicinity of the mask surface, where clearly the asymmetric nature of the resulting EMF can be observed. With SOLID-EUV, users can choose the angle of incidence including, in the case of 2D topographic masks (that is, lines and spaces), light directions outside the simulation plane.

Large Mask Areas

The short wavelength of EUV light leads to simulations consuming significant memory and CPU time, even for small mask areas. To enable the simulation of reasonable field sizes, SOLID-EUV can use the so-called high performance mode, which is based on a special decomposition technique. The time for the near-field computation can be reduced by two orders of magnitude, whereas the required memory decreases almost by the same factor.

Figure 2 (left) shows results for a contact hole array calculated rigorously using FDTD. A pattern of this complexity can take several hours to be simulated; the same problem can be solved about 100 times faster using the high performance node (see Figure 2 (right)) with little difference in the results.

Stray Light (Flare)

Another significant challenge in EUV lithography is the flare effect, which primarily stems from residual surface roughness of the mirrors within the EUV illumination and projection system. This long-range effect strongly impairs image fidelity on the wafer. The flare models of SOLID-EUV can simulate this behavior effectively, even accounting for the actual mask layout in large regions surrounding the actual metrology site. The flare models implemented in SOLID-EUV combine a constant background flare model with a power spectrum density approach. Several multiparameter approaches can be