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TCAD News

September 2008

Contents

7

Taurus™ Enhancements: TSUPREM-4™ and

Medici Version A-2008.09

8

TCAD Sentaurus in the Newsroom

Latest Edition

Inasofteconomy,semiconductorcompanies are under tremendous pressure to reduce costs and increase productivity. With TCAD, semiconductor companies can reduce their reliance on running experiments with silicon, providing cost-saving opportunities even when they are faced with increasing complexity in processing techniques.

I am pleased to announce yet another TCAD Sentaurus release, Version A 2008.09, which includes a number of enhancements in advanced models, robustness, and usability, representing our commitment to enable our valued customers to continue the quest for developing and optimizing technologies in a more economical way.

As new materials and novel device designs are needed to further CMOS and memorydevice scaling, a range of advanced physical models has been added to TCAD Sentaurus Version A-2008.09 to allow users to explore these technology options. While high-k dielectrics and metal gate stacks are more widely adopted, further optimization is necessary to ensure its production worthiness and high yield. It is also true for stress, substrate, and junction engineering, which require experimental splits to determine the best conditions to maximize performance.

Three-dimensional simulations are increasing not only for nanoscale CMOS and memory devices, but also for power and optoelectronic devices. TCAD Sentaurus Version A-2008.09 includes several robustness enhancements that, along with usability improvements, help increase simulation productivity.

For Taurus users, Version A-2008.09 has incrementalfeatureandmodelenhancements for both TSUPREM-4 and Medici.

I trust that you will find the new and advanced capabilities in Synopsys’ TCAD tools helpful for achieving your modeling and simulation tasks. As usual, please contact the Synopsys TCAD team with your feedback.

With best regards,

Terry Ma

VP Engineering, TCAD

Contact TCAD

For further information and inquiries: tcad_team@synopsys.com

Overview of TCAD Sentaurus Version A-2008.09: Developments

and Enhancements

Introduction

 

 

 

Sentaurus Device Monte Carlo not only

uses either an analytic method or a fast level-

Users of TCAD Sentaurus can look forward

features new models – analytic conduction

set method to perform boundary-modifying

to many new features and enhancements in

band structure, generalized,

nonparabolic,

operations.

 

 

 

 

 

Version A-2008.09. As part of the continual

isotropic (G-NPISO) hole scattering model,

The analytic method, based on a string

effort to improve the capabilities and

and SiGe hole transport simulation – but

algorithm, is very fast, accurate, and memory

robustness of three-dimensional (3D) process

also is now bundled with a band structure

efficient. However, this method is less

simulation,

the

MGOALS3D

geometric

calculator called Sentaurus Band Structure.

adequate for operations involving boundary

engine

has been enhanced

significantly

In the area of framework and usability, a link

collisions and self-intersections, as when

with boundary-modifying operations based

has been provided to the Synopsys layout

depositing in concave regions or etching

on robust level-set methods. The growing

editor and viewer IC WorkBench EV Plus,

convex regions. In such cases, MGOALS3D

importance of solid phase epitaxial regrowth

enabling users to read in large mask files

uses the fast level-set method.

 

 

(SPER) processes – used in ultrashallow

for subsequent selection domains for TCAD

The fast level-set equations are solved on a

junction processing – and stress memorization

simulation. Many usability enhancements have

separateCartesianmeshthatisindependentof

technique for mobility enhancement is

also been added to Sentaurus Workbench,

the simulation grid. After solving the fast level-

reflected by the introduction of new models.

maintaining a trend started with the last

set equations, the newly created boundary is

In the area of numerics in process simulation,

release that focused on user-friendliness and

extracted from the level-set function on the

mesh

adaptation

has been enhanced with

productivity enhancements.

 

 

 

Cartesian mesh and incorporated into the

new criteria for refinement control, while

 

 

 

 

 

 

 

Native 3D Process Simulations using

simulation mesh using a library developed

parallelization has progressed with a new

MGOALS3D

 

 

 

 

 

at Synopsys, called PolyBool. The PolyBool

mesh-partitioning scheme and multithreaded

With the 45-nm process node in production

library implements a robust set of Boolean

support for Monte Carlo implantation.

The emerging kinetic Monte Carlo technique

and ongoing research and development of

operations on 3D structures.

 

 

 

the 32-nm and 22-nm nodes, the scaling of

MGOALS3D

supports

the

following

implements a new jump algorithm to improve

CMOS technology remains unabated. The

operations:

 

 

 

 

 

run-time and new physics to support SPER

new materials,

such as

silicon

germanium,

Isotropic etching and deposition

 

 

and stress-inducing silicon germanium.

high-k dielectrics [1][2], and process

 

 

 

 

 

 

 

 

Anisotropic

(vertical)

etching

and

Sentaurus Topography, a physical etching

techniques used to improve performance also

and deposition simulator, delivers extended

lead to increasing process complexity and

 

deposition

 

 

 

 

modeling

capabilities,

better

accuracy

development costs. This trend is expected

Directional etching and deposition

 

 

control using adaptive time-stepping, and a

to

accelerate

as new

device

structures

• Chemical-mechanical polishing, strip, and

physical model interface that enables users

– for example, FinFETs [3], SegFETs [4], and

to implement their own custom deposition

corrugatedorverticallyformedchannelCMOS

 

fill

 

 

 

 

 

In MGOALS3D, all boundary-modifying

models. More realistic modeling of deposition

transistors – gain acceptance beyond the 22-

processes (for example, low-pressure

nm node. A common characteristic of these

operations default to the analytic method

chemical vapor deposition) and etching

advanced device structures is the importance

except for isotropic deposition and etching,

processes (for example, deep reactive ion

of 3D effects. To address the rising interest

which are performed using the fast level-set

etching)isnowpossible,includingphenomena

in 3D process simulation, Version A-2008.09

method. This combination uses the strength of

such as microtrenching, bowing, aspect

of Sentaurus Process features a significantly

both methods – analytic operations preserve

ratio–dependent

etching,

and microloading

improved library for 3D geometry operations:

the integrity of the edges with anisotropic

during complex plasma-etching.

 

MGOALS3D.

 

 

 

 

 

operations, and the fast level-set approach

In Sentaurus Device, nonlocal tunneling into

With the availability of MGOALS3D,

allows for the efficient simulation of isotropic

and out of traps in semiconductor regions with

Sentaurus Process now supports three

operations.

 

 

 

 

 

charge boundary conditions is now allowed,

approaches to 3D geometry operations.

In 3D, the structure is remeshed only if the

with particular relevance to the simulation of

MGOALS3D

complements

the

previous

next step requires an up-to-date

mesh.

nanocrystal nonvolatile memory.

 

methods of the ‘paint-by-numbers’ scheme

This approach improves the robustness of

In addition, in nonvolatile memory, the rapidly

[5]

and the integrated

Sentaurus

Process

geometry-generating operations as well as

growing interest in phase-change memory

– Sentaurus Structure Editor interface [6],

efficiency

by

eliminating

computationally

(PCM) is enhanced by including improved

both of which rely on Sentaurus Structure

expensivemeshingandinterpolationoperations.

phase transition kinetics that take into account

Editor for geometric operations.

 

 

This feature is introduced in MGOALS3D in

the nucleation and growth phase dynamics

MGOALS3D is an internal 3D geometric

Version A-2008.09. MGOALS3D is tightly

for Ge2Sb2Te5 material. For optoelectronics,

engine of Sentaurus Process, which was

integrated with Sentaurus Mesh in Sentaurus

the new raytracer is faster and, by interfacing

first introduced in Version A-2007.12 with

Process, and it is recommended to be used

with the transfer matrix method, it can now

capabilities for etching and deposition. It is

with the aforementioned meshing engine.

treat wave interference effects such as those

now extended to include many new modules

Version A-2008.09 of the MGOALS3D

occurring in antireflective coatings.

specifically developed for 3D

operations. It

structure

generator also

has

 

several

(a)

(b)

(c)

(d)

Figure 1. NMOS transistor geometry at different stages: (a) trench corner, (b) drain process structure with silicon recess, (c) salicides and metal-stressed gate formation, and (d) final geometry with contact trenches.

TCAD News

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Trapezoidal Etching

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The trapezoidal etch model provides a simple

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

but flexible approximation for a number of real

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

etching processes. The location of the etch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

is determined by masking layers – layers of

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

material impervious to the etch – and does

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

not require mask-dependent coordinates to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

be specified.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The trapezoidal etch model uses three

(a)

 

 

 

 

 

(b)

 

 

 

 

 

 

 

 

(c)

 

 

 

 

 

 

 

(d)

 

 

 

 

 

parameters

thickness,

angle,

and

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

undercut – to specify the shape of the

Figure 2. PMOS transistor geometry at different stages: (a) drain extension structure, (b) drain process structure with SiGe-raised pockets, (c) salicides and

region to be removed, corresponding to the

metal gate formation, and (d) final geometry with contact trenches.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vertical depth (in micrometers), the sidewall

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

improvements to the photo, fill, and strip

where f({Xi}) is modeled by users with the

plasticity can cover a wide range of physical

angle (in degrees), and the horizontal

penetration (in micrometers) of the etch under

commands. Directional etching is now fully

expression of local fields {Xi}, and sv and Lv

effects such as “dislocation” plasticity, the

the edges of the masking layer, respectively.

supported. Isotropic deposition is enhanced

are user input parameters. The orientation-

recrystallization of the poly gate, and the

These parameters can be used to approximate

and now runs faster and uses less memory,

dependent velocity, vo, interpolates the

rearrangement and the growth or shrinking of

a number of real etching processes, including

enabling the deposition of thinner layers in

velocity for a given direction with the velocity

poly grains. The plasticity effect is supported

combinations of vertical and isotropic etches,

3D. A new surface repair algorithm is used

parameters V100, V110, and V111 along

by the fact that the gate material becomes

V-groove etches, and etches that produce

to improve the results after deposition and

the <100>, <110>, and <111> directions,

softer and the values of the mechanical

retrograde sidewall profiles.

 

 

 

etching. The algorithm detects thin slivers

respectively.

 

 

 

 

 

 

 

 

 

 

 

 

parameters such as yield stress become lower

When the parameters satisfy the relationship

of material and cuts them away from the

In amorphous regions, no point defects and no

at high temperature. In addition, the viscous

thickness/undercut = tan(angle),

the

structure, avoiding potential problems in

electric field are assumed, so that the simplest

flow of the spacer material becomes stronger

etch approximates a vertical etch with an

subsequent mesh generation steps.

 

diffusion model is applied. The impurity atoms

under high temperature and stress. Therefore,

isotropiccomponent.Thisisthecasewhenever

The 45-nm technology node for NMOS and

in the region where recrystallization occurs

the stress memorization effect is modeled

two or fewer of the parameters are specified.

PMOS, recently unveiled by Intel, features

can be pushed into neighboring amorphous

by elastoplastic and viscoelastic mechanical

The left half of Figure 4 shows the result when

high-k dielectrics, a metal stress gate, and

regions. A phenomenological model has been

models for the poly gate, the amorphized

etching a planar substrate: The etch region is

a contact stress trench [1]. The device

introduced to model this effect. The following

source/drain regions, and the spacer, thereby

a trapezoid of depth thickness, extending a

dimensions are

relatively small: gate

length

equation models the diffusion of the dopant

describing the strain conservation effect

distance undercut beneath the mask edge,

of 40 nm, poly-to-poly pitch of 160 nm,

species X during SPER:

 

 

 

 

 

 

needed for SMT simulation.

 

 

and with a sidewall slope of angle degrees.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

and trench width of 70 nm. These small

 

 

∂X

= (1 – α)

∂X

 

 

 

 

 

 

The elastoplastic model implemented in

The right half of Figure 4 shows the result

dimensions combined with stress engineering

 

 

Crystal

 

 

SentaurusProcessisrateindependent,thatis,

when etching a nonplanar surface.

 

motivate 3D simulations for these and similar

 

 

∂t

 

 

 

 

 

∂t

 

 

the stress–strain relationship is independent

 

 

 

 

 

 

 

 

 

 

 

 

+ α · (DA

(X)(

 

 

In

Figure

5,

the

condition

thickness/

structures.

 

 

 

 

 

 

 

 

 

 

 

 

 

of the rate of loading and obeys the von Mises

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1 shows

several of the

geometry-

 

 

 

 

 

 

 

 

 

 

 

 

yield criterion with

the associative flow rule

undercut < tan(angle) is satisfied, and the

 

 

 

 

 

 

 

 

 

 

 

 

sloped sidewall of the etch extends out under

 

 

 

 

+

 

· (αvnorm LX

 

α)

 

(that is, the plastic potential is equal to the

generating steps of the NMOS transistor,

 

 

 

 

 

 

 

the opening in the mask. The intersection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

featuring the typically recessed drain areas.

where α denotes the amorphous state (0

yieldfunction)andbilinearisotropichardening.

between the bottom of the etch region and

The PMOS structure is shown in Figure 2 and

indicates a crystalline state and 1 indicates an

The yield function takes the form:

 

 

the sidewall is no longer directly beneath

features the diamond-like silicon-germanium

amorphous state). The third term models the

f(σ, ep ) = √σ‘

σ‘ –

2

(σ + H e p)

 

the edge of the mask. If the mask opening

regions in the drain area. All of the shapes

“snow plow” effect of dopants by the moving

 

is sufficiently narrow, the bottom of the etch

 

 

ij

ij

3

Y

iso

 

were generated using isotropic, anisotropic,

front. L defines the jumping rate of dopants

 

 

 

 

 

 

 

 

region disappears entirely, resulting in a V-

and directional operations with MGOALS3D.

from regrowing regions to neighboring

which is less than zero in the

elastic

groove etch. Figure 6 shows the case where

In summary, MGOALS3D is a suitable option

amorphous regions and is modeled by:

regime

and

is equal

to zero during

plastic

angle > 90°. In this case, the bottom of the

 

 

L = g({Xi }) · L0 exp (kTEL

(

 

deformation (no positive values are possible

etched region is wider than the opening in the

for simulating CMOS and power structures,

 

 

 

 

 

 

under the rate-independent condition). In

masking layer.

 

 

 

 

 

and the tool syntax and usage (being similar

 

 

((

 

 

 

 

 

to the 2D mode)

simplify the

transition to

 

 

x

(

1 + (s

 

– 1) exp

(

ds

the expression of the yield function, σY is the

 

 

 

 

 

 

 

 

3D. Moreover, the close integration between

 

 

 

equivalent yield stress in uniaxial tension, Hiso

 

-0.5

 

 

 

 

 

 

 

 

 

 

 

L

 

 

 

 

 

LL

is the isotropic hardening modulus, and the

 

 

 

 

 

 

 

 

MGOALS3D and Sentaurus Mesh improves

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Einstein summation convention is assumed.

 

 

 

 

 

 

 

 

the robustness of the simulations, making

Plasticity Model for Stress

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Both parameters are available to users in the

 

0

 

 

 

 

 

 

Version A-2008.09 of Sentaurus Process

Memorization Technique

 

 

 

 

 

parameter database of Sentaurus Process.

[μm]

 

 

 

 

 

 

 

attractive for 3D TCAD simulations of modern

TheaggressivescalingofCMOStechnologies

Users

can

also change

some

parameters

 

 

 

 

 

 

 

devices.

 

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

Solid Phase Epitaxial Regrowth Model

requires

solutions

 

to

achieve

significant

that affect the convergence of the nonlinear

 

0.5

 

 

 

 

 

 

performance gains for deep-submicron

numeric algorithm. The overall feature can be

 

 

 

 

 

 

 

 

Amorphization by heavy ion implantation

 

 

 

 

 

 

 

 

devices.

Stress

engineering

 

has become

switched on materialwise by simply setting the

 

 

 

 

 

 

 

 

occurs when atoms of the target crystalline

a standard feature to introduce tensile or

flag IsPlastic in the Mechanics section

 

1

 

 

 

 

 

 

semiconductor

are

dislodged

 

from

their

compressive stress in the transistor channel

of the material in the parameter database.

 

0

0.5

 

1

 

1.5

2

lattice sites. Since the free energy for

region to increase carrier mobility. One of the

 

 

 

 

 

 

 

 

 

 

 

 

X [μm]

 

 

 

Figure

3

shows

the

equivalent

plastic

 

 

 

 

 

 

 

 

amorphous silicon is higher than for crystalline

most popular local-strain techniques exploits

Figure 4. Trapezoidal etch for thickness/undercut

silicon, there is a driving force towards

the strain induced by a deposited contact etch

strain, that is, the accumulated plastic strain

= tan(angle).

 

 

 

 

 

 

recrystallization. The recrystallization velocity

stop layer (CESL): Its benefits can be further

magnitude, in the poly gate of an n-channel

 

-0.5

 

 

 

 

 

 

depends on the substrate orientation [7], the

improved in n-channel MOS transistors with

MOS transistor after deposition of a 50-nm

 

 

 

 

 

 

 

 

damage morphology [8], and the presence

the so-called stress memorization technique

SiN layer followed by a 1020°C spike anneal

 

 

 

 

 

 

 

 

of impurities in

the

amorphous

layer

[9]. In

(SMT). This technique

is connected mostly

for source/drain activation.

 

 

 

0

 

 

 

 

 

 

addition, the recrystallization can redistribute

with the following process steps:

 

It clearly demonstrates how the deformation of

 

 

 

 

 

 

 

 

[μm]

 

 

 

 

 

 

 

impurities, for example, fluorine atoms [10].

Implantation

 

 

(high-dose

 

 

 

amorphizing

the polysilicon gate is retained after removing

 

 

 

 

 

 

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

the SiN stress liner

layer through

plastic

 

 

 

 

 

 

 

The recrystallization

process is

commonly

 

implantation into silicon or polysilicon)

strain.

 

 

 

 

 

 

 

 

0.5

 

 

 

 

 

 

known as solid phase epitaxial regrowth

• Deposition of a SiN or an oxide cap layer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(SPER) and, in this release of Sentaurus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Process, a new model has been implemented

High-temperature anneal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

to treat SPER in continuum mode, in

Removal of cap layer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

0.5

1

 

1.5

2

addition to the already available models in

After the deposition of a tensile layer over

-0.1

 

 

 

 

 

 

 

 

 

 

 

X [μm]

 

 

 

Sentaurus Process

KMC. The

movement

 

 

 

 

 

 

PlasticStrainEQV [1]

Figure 5. Trapezoidal etch for thickness/undercut

of the recrystallization front during SPER is

the NMOS, the poly gate is stretched along

 

 

 

 

 

 

1.5e-02

 

 

 

 

 

 

1.2e-02

< tan(angle).

 

 

 

 

 

 

simulated by the level-set method:

 

the channel and is compressed normal to the

 

 

 

 

 

 

9.1e-03

 

 

 

 

 

 

 

 

 

wafer surface. Correspondingly, the channel

 

 

 

 

 

 

6.2e-03

 

-0.5

 

 

 

 

 

 

∂φ

 

 

 

 

[μm] -0.05

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

region is stretched laterally and is compressed

 

 

 

 

 

3.3e-03

 

 

 

 

 

 

 

 

∂t

 

+ v ·

φ = 0

 

 

 

 

 

 

 

 

4.5e-04

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vertically. According to linear elasticity theory,

Y

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

where φ is the distance from the front. The

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

the channel stress would disappear after

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

moving velocity v on the boundary depends

removal of the cap layer. However, in SMT,

 

 

 

 

 

 

 

 

[μm]

 

 

 

 

 

 

 

on the normal orientation, the surface

some of the resulting strain acting as a

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

distance (ds), and the impurity concentrations

stressor for the channel region is conserved

 

 

 

 

 

 

 

Y

 

 

 

 

 

 

 

described by the local fields {Xi}:

 

 

in the structure and increases on-current by

 

 

 

 

 

 

 

 

 

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

up to 20%.

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

0.05

 

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X [μm]

 

 

 

 

 

 

 

 

 

 

 

φ

= f({Xi}) vo

 

φ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vnorm = v ·

 

 

 

The exact mechanism of memorization is not

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

φ

 

(φ (

 

Figure 3. Equivalent plastic strain retained in the

 

1

0.5

1

 

1.5

2

x (1 + (sv – 1) exp (

 

 

yet fully understood, but it could be explained

poly gate after removal of SiN stress liner layer.

 

0

 

ds

 

by plasticity effects in the poly-gate regions

 

 

 

 

X [μm]

 

 

 

 

In this simulation, the new plasticity model was

 

 

 

 

 

 

 

 

Lv ((

 

or the source/drain regions where the term

applied to polysilicon only.

 

 

 

Figure 6. Trapezoidal etch for angle > 90°.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCAD News

September 2008

TCAD News

Adaptive Meshing Improvements

Tailoringmeshtoaspecificsimulationproblem with static refinement boxes can be a tedious and time-consuming task. In addition, for some applications, dopant profiles evolve so much during processing that the areas where a finer mesh was needed at the beginning are far removed from the areas where a finer mesh is needed at the end. To capture accurately the entire evolution with a static mesh, it is necessary to put a fine mesh over large areas of the structure, leading to long simulation times and large memory use.

Adaptive meshing was first released in Sentaurus Process Version Y-2006.06 to address these issues [11]. In Version A 2008.09, the adaptive meshing capabilities have been enhanced considerably to make this feature even more flexible, reliable, and user-friendly.

Besides mesh adaptation triggered by large field gradients or by a field value being in a certain value range (interval refinement), Sentaurus Process Version A-2008.09 also supports mesh adaptation based on relative or absolutelineardifferenceaswellaslogarithmic or inverse hyperbolic sine difference. Another new and very attractive feature is the control of the local dose error.

For adaptive mesh refinement of an analytic implant profile, this algorithm estimates the dose change that would result if a given element is further refined. If the dose change is higher than a user-specified limit, the element is further refined; otherwise, it is considered to be already sufficiently refined. For the case of an adaptive remeshing step during, for example, a diffusion simulation, this algorithm prevents too aggressive unrefinement, which may occur near the peak of a profile where the field gradients are low.

The reliability of adaptive meshing strongly benefits another meshing feature (UseLines) that was introduced in Sentaurus Process Version Z-2007.03 [12]. This feature allows user-controlled partitioning of a structure by introducing dividing lines. The bisectional algorithm then initially treats these partitions separately. This ensures that in regions where, for example, the profiles have not changed, the mesh remains mostly unchanged. This avoids unnecessary interpolation errors and also further improves the stability of simulations that involve moving boundaries.

Parallelization in Sentaurus Process

In addition to the already, very efficiently, parallelized Sentaurus Device, with Sentaurus Process Version A-2008.09, users can benefit from the high-performance multicore servers built on the latest Intel Xeon and AMD Opteron processors. In Version A-2008.09, Sentaurus Process provides parallel processing for Monte Carlo implantation, matrix assembly, and linear solvers through the generation of multiple threads to accelerate simulations on multicore shared-memory computers.

The performance of Monte Carlo implantation can be improved significantly when a large job with many particles (N) is divided into multiple jobs (m) with a smaller number of particles (N/ m). Sentaurus Process then creates multiple threads and launches multiple instances of Monte Carlo implant. Each instance of Monte Carlo implant runs independently on its own thread. After these threads are finished, the results are averaged, thereby improving the effective execution speed for a large job.

Since there is very little overhead in multithreading, Monte Carlo implantation in Sentaurus Process achieves almost ideal scalability for simple structures, with speedup factors greater than 1.9, 3.9, and 7.2 times for two threads, four threads, and eight threads, respectively. For practical examples, taking into account serial time (due to the portion of code that is not parallelized), multithreading overheads, and trajectory variations, the overall speedup is approximately 5–6 times on eight-core machines.

Compared to multiprocess parallelization (MPP), multithreaded parallelization is generally more robust, easier to use, and more efficient. Therefore, multithreading is preferred to MPP for Monte Carlo implantation on multicore computers.

Matrix assembly has been parallelized based on a mesh-partitioning algorithm. At the beginning of the diffusion ramp, Sentaurus Process will partition the mesh into levels, and each level is divided into different nonadjacent parts – edges belonging to each part on the same level do not cross over to the other parts. Each part contains approximately the same number of elements, and its assembly can proceed independently of the other parts.

Figure 8 shows schematically the partitioning of a 2D mesh into three levels. The first level (red) has four parts that do not touch; the second level (yellow) also has four parts, separated by a third level (blue). In addition to the default parameters, users can specify their own partitioning parameters.

10

 

 

-9

 

 

8

9

10

Figure 7. Magnification of drain corner of an LDMOS device, using adaptive meshing (top) and fixed meshing (bottom). This example illustrates how adaptive meshing can resolve automatically the important features of a doping profile (here, the high arsenic concentration near the drain contact area), while saving nodes in the bulk where the profiles are relatively featureless.

Figure 8. Illustration of partitioning of a 2D mesh into three levels for efficient parallelization: the first level (red) has four nontouching parts, the second level (yellow) has four parts as well, separated by a third level (blue).

Moreover, using parallel linear solvers is now easier with the specification of all parallel settings through the input file, thereby eliminating the need to set the environment variable OMP_NUM_THREADS. The improved iterative algorithms, implemented in Sentaurus Process Version A-2008.09, strengthen the performance of the iterative linear solvers, both in serial mode and parallel mode.

New Features in Sentaurus Process Kinetic Monte Carlo

The improvements for Sentaurus Process Kinetic Monte Carlo (Sentaurus Process KMC) Version A-2008.09 have focused on two main areas: improved KMC performance and additional physics in the models.

Improved KMC Performance

Two special diffusion algorithms, switched on by default, have been included to make the simulation of particle diffusion in Sentaurus Process KMC faster. The double hops algorithm performs two diffusion events at the same time, saving CPU time in the Sentaurus Process KMC core when picking up the next random event. It produces a speedup of approximately 10%.

Muchmoreimportantisthelonghopalgorithm, which changes the hopping distance (lambda) of the migrating particles, trying to make this distance as large as possible depending on theinternalSentaurusProcessKMCmeshand updating the migration frequency to simulate correctly the same diffusivity as before. When this algorithm is applied, it simulates the diffusivity n2 times faster than before, where n is the ratio of the regular lambda and the “long” one.

To simulate correctly the interactions and capture volumes, the long hop algorithm is deactivated automatically by Sentaurus Process KMC when it detects the presence of other particles. Consequently, it typically speeds up the diffusion of particles into and out of the bulk, but it does not speed up the diffusion of particles in the implant regions.

In any case, when applying the defaults, these two algorithms produce an overall speedup varying between 1.2 and 3 times. Since the algorithms are applied only to regions where they are feasible, even if the user configures them to be switched on (the default), and theseregionsdependheavilyonthesimulation conditions, it is almost impossible to make an accurate estimation of how much speedup will be observed. Additional information about these algorithms can be found in the literature [13]. Other minor performance optimizations have been performed in the KMC2PDE and atomization algorithms.

Additional Physics

An important implementation effort has been devoted to the amorphization and recrystallization of silicon. In particular, in addition to diffusion in amorphous material, clustering in amorphous material is available. The amorphous–crystalline interface accepts several new models, including the standard three-phase segregation model. The accuracy of SPER has also been improved by adding Fermi level and impurity dependencies to the SPER velocity. Lastly, a new model for impurity sweeping has been implemented to overcome the mesh dependencies introduced by the previous model. All these changes have made possible the successful simulation of several SPER features [14], as illustrated in Figure 9.

Given the growing importance of stress and SiGe,acontinualefforthasbeenconductedto improve modeling of these new technologies

by Sentaurus Process KMC. In particular, Sentaurus Process KMC Version A-2008.09 includes diffusion of germanium following the model proposed by Castrillo et al. [15].

Advanced Calibration Enhancements

The Advanced Calibration of Version A-2008.09 for Sentaurus Process KMC includesseveralchangescomparedtoVersion A-2007.12, due to model enhancements and bugfixesofthesimulatorandtheconsideration of a wider range of process conditions for the calibration.

The recrystallization velocity is now in agreement with the literature for an undoped amorphous-silicon layer on top of (100)- oriented crystalline silicon. In addition, the recrystallization velocity is enhanced in the presence of n-type and p-type doping.

The accuracy of the boron calibration has improved by accuracy enhancements for low-temperature anneals, the introduction of the interaction with extended defects, and the parameters for the diffusion and clustering in amorphous silicon.

Calibrated fluorine parameters have also been introduced to Advanced Calibration. The calibration is based on SIMS data for fluorine co-implants and BF2 implants. Following the literature, a very stable and mobile fluorine–interstitial pair Fi of neutral charge is assumed, as well as fluorine clustering by fluorine–interstitial pairs decorating one or two vacancies. Fluorine is swept by the recrystallization front, and its incorporation during SPER is temperature dependent. In addition, fluorine has a retarding impurity effect on the recrystallization velocity and is allowed to diffuse in amorphous silicon.

Application Example

An application example has been created to demonstrate the application of the latest version of Sentaurus Process KMC to a CMOS 45-nm technology reference flow. Advanced process steps such as Ge–C–BF2 cocktail implants for PMOS shallow junction formation, SiGe source/drain regions in PMOS for channel stress engineering, and high-temperature millisecond laser annealing forhighlevelsofdopantactivationareincluded in the flow to reflect the most up-to-date development in current CMOS technologies.

To expedite the simulation, a hybrid approach that combines continuum simulation with KMC simulation is used to split the flow into two segments. The fast continuum simulation is used for the simulation of the first few steps up to gate reoxidation, including channel implants and anneals. Then, KMC simulation is applied to simulate the rest of the flow including several critical steps that start from the LDD and halo implants, and continue to the final millisecond laser annealing. Such a hybrid approach improves the CPU time of the simulation to within a few hours, without sacrificing the accuracy of the results.

To facilitate the transition from the KMC results to subsequent device simulation, the example uses two approaches for dopant deatomization, which is a process that converts discrete dopants from KMC

 

1019

 

 

[cm–3]

 

 

[cm–3]

Concentration

1018

 

Concentration

 

 

 

1017

 

 

 

0

50

100

Depth [nm]

1019

 

 

1018

 

 

1017

 

 

0

50

100

Depth [nm]

Figure 9. Dopant redistribution during SPER: indium 90 keV 4×1013 cm–2 implanted into amorphous silicon (Ge PAI) and annealed at 600°C for 60 s (left) and 120 s (right) [14].

TCAD News September 2008

TCAD News

Figure 10. Final KMC results with: discrete dopants (left), corresponding continuous profiles deatomized in KMC using the first approach (middle), and continuous profiles deatomized in Sentaurus Mesh using the second approach (right).

into continuous profiles suitable for device simulation, as illustrated in Figure 10. One approach deatomizes the dopants at the end of the KMC simulation onto the 2D process mesh and leads to a fast 2D device simulation. Theotherapproachusesthedopantscreening feature in Sentaurus Mesh that associates each dopant with a doping density function. The latter approach leads to a more accurate 3D device simulation since it accounts for all current paths under the gate including those oriented in the third dimension. Moreover, advanced quantum models, such as density gradient, are used in the device simulation to improve the accuracy of the results, such as shown in Figure 11.

 

10-3

 

 

Vds = 1 V

 

 

 

 

 

 

 

10-4

 

 

 

 

[A/μm]

10-5

 

 

Vds = 50 mV

 

 

 

 

 

 

 

 

 

 

Current

10-6

 

 

 

 

 

PMOSFET

 

NMOSFET

 

Drain

10-7

 

 

 

 

 

 

 

10-8

 

 

 

 

 

10-9

-0.5

0

0.5

1

 

-1

Gate Voltage [V]

Figure 11. Id–Vg results of 3D NMOS and PMOS device simulations using dopant profiles deatomized in Sentaurus Mesh.

Conclusions

Sentaurus Process KMC Version A-2008.09 isausefultechnologytounderstandthe“under the hood” physics involved in modern devices as shown in several recent publications regarding topics as diverse as self-interstitial defect modeling [16], dopant diffusion under stress [17], dissolution of extended defects in strained silicon [18], and the modeling of temperature, stress, defects, and dopant activation during spike and millisecond laser annealing [19].

The physical insight gained from KMC simulation of detailed dopant, point defect, and extended defect interactions helps researchers understand and optimize process sequences. Moreover, the combination of KMC and continuum process simulations, as illustrated by the above application example, allows the insertion of KMC simulations into full-flow process simulations.

Improved Modeling of Nonvolatile Memory Devices in Sentaurus Device

Improvements in the handling of tunneling and traps in Sentaurus Device add flexibility to simulations of nonvolatile memory (NVM) devices. Sentaurus Device now simulates nonlocal tunneling into and out of traps in semiconductor regions where a charge boundarycondition(CBC)hasbeenspecified. This is of particular interest for the simulation of nanocrystal-based NVMs since the many floating polysilicon particles can then be assigned CBCs where only the Poisson

equation needs to be solved, improving convergence robustness and significantly speeding up simulations.

Another important new feature is the ability to change trap levels as a function of other datasets such as, for example, the electric field within each nanoparticle. Therefore, eigenenergy levels within the nanoparticles can be modeled with discrete trap levels, which are allowed to shift energy levels as a function of local electric fields, as expected in a real quantum system with trapezoidal wells.

In a simplified example, simulations of the retention properties of a section of a 3D memory cell structure containing nine nanocrystals were performed. Single-level electron traps were used to emulate the ground quantized state in the nanoparticles, andtheaffinityofpolysiliconwasreducedsuch that the conduction band would represent all higher energy levels in a continuous band. The trap concentration was set up to represent approximately 12 states in 7-nm diameter nanoparticles, and all nanocrystals initially were charged with 12 electrons, which translates into –1.92×10–18 C. The device is then left unbiased to relax over a period of 109 s using tunneling out of the energy levels and into the channel region.

Figure 12 shows a 3D surface plot of tunneling current density for a trap energy level ET = 0.1 eV below the conduction band energy, EC, overlaid and aligned to the simulated 3D structure with nanocrystals represented by spheres. Notice that nanocrystals at different

Z

Y

X

Q(6,6)

Q(6,4)

Q(4,4)

Figure 12. Three-dimensional surface plot of tunneling current density overlaid on part of the NVM cell showing corresponding nanocrystals.

 

12

 

 

 

 

of Electrons

10

 

 

 

 

 

Q(4,4)

 

 

 

Number

 

 

 

 

8

Q(5,4)

 

 

 

Q(6,4)

 

 

 

 

Q(6.5)

 

 

 

 

 

Q(6,6)

 

 

 

 

6

106

107

108

109

 

105

Time [s]

Figure 13. Charge evolution in some nanocrystals.

locations discharge at different rates due to the different potentials along the channel of the MOS transistor underneath the particles. This is also evidenced in Figure 13, which shows charge evolution in some of the nanocrystals.

Figure 14 compares charge evolution for simulations with ET – EC = 0.1 eV and ET – EC = 0.3 eV for one of the particles. As expected, electron tunneling is slower out of deeper traps.

 

12

 

 

 

 

of Electrons

10

 

 

 

 

 

 

 

 

 

Number

8

 

 

 

 

 

ET – EC= 0.1 eV

 

 

 

 

 

 

 

 

ET – EC= 0.3 eV

 

 

 

6

106

107

108

109

 

105

 

 

 

Time [s]

 

 

Figure 14. Comparison of charge evolution for the simulations with different trap energy levels.

Enhancements for Phase-Change Memory Devices

Phase-change memory (PCM) is an emerging technologyfornonvolatilememorydevices.The device operation relies on reversible changes of the phases of materials such as Ge2Sb2Te5 (GST). At room temperature, two phases – a crystalline one and an amorphous one – are observed in practice and exhibit different conductivities that are used to establish the

memory effect (read operation). Switching from the crystalline to the amorphous phase (reset operation) is performed electronically by applying a short but sufficiently large current pulse, which causes the material to melt. After the pulse ends, the temperature decreases rapidly and the GST solidifies, but it has no time to recrystallize and remains amorphous. The transition from the amorphous to crystalline phase (set operation) is performed with a smaller pulse where the temperature does not reach the melting temperature and crystallization occurs.

Modeling the fundamental operations – read, reset, and set – is a challenging task and includes modeling of the phase transitions coupled with the electrothermal properties of the device. In Sentaurus Device Version A-2007.12, PCM simulation capabilities based on a multistate model were introduced [20]. In Version A-2008.09, these simulation capabilities are enhanced by including improved phase transition kinetics, which

0.0

0.2

0.4

0.6

0.8

1.0

Figure 15. Cross section of a “mushroom”-type PCM cell obtained after simulation of a reset (or program) operation (left) and a set (or erase) operation (right). The color bands indicate the

fraction of material that is in the amorphous phase at a given point.

1

Fraction [1]

0.5

Phase

 

0

 

 

 

 

10-9

10-8

10-7

10-6

10-5

Time [s]

Figure 16. Phase transition kinetics along reset and set operations: averaged fractions of the crystalline “s(c)”, amorphous “s(a)”, and melted “s(m)” phase values are plotted as a function of time.

 

106

 

 

 

Resistance [Ohm*μm]

105

 

 

 

 

 

 

 

GST

104

 

 

 

 

 

 

 

 

103

0.002

0.003

0.004

 

0.001

Set Current [A/μm]

Figure 17. Dependency of final GST resistance as a function of the set current, from where the set current operation window can be concluded.

 

TCAD News September 2008

TCAD News

take into account the nucleation and growth phase dynamics for the GST material. The list of material properties that can depend on the phase has also been extended to include the thermal conductivity, the heat capacity, and the carrier mobility. The apparent bandedge shift model has been enhanced as well. In addition, it is now possible to perform consistent simulations of read, reset, and set operations within the same transient modeling framework.

Enhancements in Sentaurus Device Monte Carlo

New features have been added to Sentaurus Device Monte Carlo Version A-2008.09:

An analytic conduction band structure.

A generalized, nonparabolic, isotropic hole scattering model.

A model for SiGe hole transport simulation.

Analytic Conduction Band Structure

An analytic band structure for the conduction bandcanbechosenasanalternativetothefullband tables. Two models are available based on the two-band k.p theory [21] and ellipsoidal analytic formula [22]. The computation of the band structure based on the analytic formula is fast and efficient. The models can compute the strained band structure based on the input stress tensor as required. This allows for omitting the step of the preparation of strained band-structure tables for each stress condition that is necessary for the full-band Monte Carlo simulation.

The two-band k.p model demonstrates very good agreement with the empirical pseudopotential method (EPM) band structures near the valley minima. In Figure 18, the drain current values for a <100> n-type MOSFET channel simulated with the twoband k.p analytic band model is compared to the full-band structure data computed by the EPM band-structure calculation. Good agreement between the two approaches is shown even though the analytic model is an approximation of the real band structure. The model is available in the full Brillouin zone (FBZ) simulation mode but not in the legacy mode.

EPM <100> 1 GPa

 

EPM <100> R−Si

 

2-band k.p <100> R–Si

 

2-band k.p <100> 1 GPa

 

0.001

 

DrainCurrent m][A/

 

0.0005

 

0.5

1

Drain Voltage [V]

Figure 18. Comparison of simulated drain current values for <100> n-type channel. The relaxed case and 1-GPa tensile case are compared

for the two-band k.p model and the EPM band structure.

Generalized, Nonparabolic, Isotropic (G-NPISO) Hole Scattering Model

The new G-NPISO model allows for all intraband and interband scatterings among the top three valence bands, as opposed to the simplified full Brillouin zone (SFBZ) model, whichonlyincludesintrabandscatteringsinthe top two bands and sets the top two interband scattering rates to the intraband scattering rates. As with the SFBZ model, the G-NPISO model uses the same approximation of an angular-averaged effective mass, but with a correct density-of-states so as to obtain the correct number of states available for the final

states allowed. It includes the nonparabolicity

0.15

of these bands but not the warping.

 

SiGe Hole Transport Simulation

 

 

0.1

 

 

 

 

 

 

This new model makes it possible to simulate

0.05

 

 

 

 

 

 

Si(1–x)Gex hole transport. It includes alloy

 

 

 

 

 

 

 

 

 

 

 

 

 

 

scattering and can input the band structure

/a]

 

 

 

 

 

 

 

in the usual way using files or it can use the

[2

0

 

 

 

 

 

 

internal k.p band structure calculator. The

Ky

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Luttinger parameters can be either input by the

-0.05

 

 

 

 

 

 

user or the formalism due to Rieger and Vogl

 

 

 

 

 

 

 

 

[23] can be used to fit to these parameters

-0.1

 

 

 

 

 

 

as a function of germanium mole fraction. The

 

 

 

 

 

 

 

 

split-off band energy can be either taken as

-0.15

 

 

 

 

 

 

input or fitted to data from Sentaurus Band

 

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

Structure as a function of germanium with a

 

 

 

 

Kx [2 /a]

 

 

 

 

 

 

 

 

 

 

 

quadratic fit.

 

 

 

 

Figure 21. Isoenergy contours of lowest

 

 

 

 

 

 

 

 

 

In addition to changes to the band structure

conduction band of Si under 2 GPa of tensile

 

caused by the addition of germanium, extrinsic

<110> stress in the vicinity of the valley on the

strain and its effects on the band structure can

kz-axis (origin at valley minimum).

 

 

be incorporated. The simulated bulk mobility

band valley on the kz-axis. The position of this

of Si(1–x)Gex material with alloy scattering is

shown in Figure 19.

 

 

 

conduction band minimum varies significantly

 

 

 

 

 

 

 

under xy shear strain. Using the automated

 

 

 

With Alloy Scattering

 

 

Newton–Raphson search algorithm provided

 

 

 

 

 

by Sentaurus Band Structure, the stress-

 

700

 

 

 

 

 

 

 

 

 

 

 

 

dependent band minimum is located easily,

 

600

 

 

 

 

 

and the relevant effective mass components

 

 

 

 

 

 

 

can

be

extracted directly. The

results

are

Mobility

500

Fit to Raw Simulation Data

 

 

 

shown in Figure 22.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

400

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

300

 

 

 

 

 

 

 

 

 

 

m<110>

 

 

 

 

 

 

 

 

 

 

 

 

m<-110>

 

 

 

 

 

 

 

 

 

5

 

 

 

m<001>

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

0.2

0.4

0.6

0.8

1

]

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

[m

 

 

 

 

 

 

 

 

 

 

Mole Fraction Germanium

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-Valley

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 19. Low-field mobility versus mole fraction

 

 

 

 

 

 

 

of germanium for relaxed Si(1–x)Gex using k.p

 

in z

3

 

 

 

 

 

 

with Luttinger parameters of Rieger and Vogl [23]

Mass

 

 

 

 

 

 

 

for the calculation of the valence band structure.

 

 

 

 

 

 

 

Effective

2

 

 

 

 

 

 

The green squares are the mobility values from

 

 

 

 

 

 

 

the bulk simulation, and the red line is the least-

 

 

 

 

 

 

 

square fit to the green squares.

 

 

 

1

 

 

 

 

 

 

New Band Structure Calculator for

0

-4 -2 0 2 4 6

8

Sentaurus Device Monte Carlo

-8 -6

 

<110> Stress [GPa]

 

 

 

 

Sentaurus Device Monte Carlo now includes a new feature called Sentaurus Band Structure, which is a tool for the computation and exploration of band-structure data of bulk crystals under arbitrary strain.

The available band-structure calculation methodsincludetheempiricalpseudopotential method (EPM) as well as six-band k.p for valence bands, and both a two-band k.p model and an ellipsoidal two-band model for (silicon-like) conduction bands. The initial version of Sentaurus Band Structure provides parameters for strained Si, Ge, and SiGe. EPM results for the band structure of SiGe and isoenergy contours for strained silicon are shown in Figure 20 and Figure 21, respectively.

Sentaurus Band Structure can be used for the preparation of band-structure and group-velocity tables for Monte Carlo device simulation. In addition, it provides a flexible Tcl scripting interface for the automatic extraction of characteristic properties of a band structure, for example, the stress-dependent effective mass components of the conduction

 

6

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

Energy [eV]

2

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

-2

 

 

 

 

 

 

 

 

-4L

Λ

Γ

X

U/K

Σ

Γ

Figure 20. Band structure of relaxed Si0.7Ge0.3 along lines of high symmetry.

 

 

 

 

 

 

 

 

 

 

-0.02

-0.01

0

0.01

0.02

 

 

 

 

εxy

 

 

 

 

Figure 22. Strain-dependent effective mass of Si in conduction band minimum on the kz-axis.

Other features of Sentaurus Band Structure include support for the computation of complex band structures (dispersion relations for interband tunneling) and support for Tk/BLT-based graphical user interfaces and visualization. To take full advantage of multicore CPUs, Sentaurus Band Structure can be run optionally in multithreaded mode.

New Efficient Raytracing for Optoelectronic Devices

Raytracing is the method of choice to simulate the electromagnetic behavior of devices that are much larger than the wavelength of simulation, such as solar cells. Sentaurus Device has revamped its raytracer to optimize speed and accuracy of computation.

The new raytracer must be used in conjunction with the complex refractive index model. It has beenimplementedbasedonlinearpolarization and geometric optics. The processes of refraction, transmission, and reflection are carefully taken into consideration to ensure energy and polarization conservation at every instance.

Rapid mapping and ordering of elements enhance the computational efficiency of the new raytracer. As a consequence, the new raytracer is eight times faster in 2D and 40 times faster in 3D compared to the old raytracer. A multithreading option has also been introduced, and this further speeds up the raytracing process.

A ray can be considered a plane wave traveling in a particular direction with its polarization vector perpendicular to the direction of propagation. The length of the polarization vector represents the amplitude,

and the square of its length denotes the intensity. The TE polarization (s-wave) applies to the ray polarization vector component that is perpendicular to the plane of incidence.

On the other hand, the TM polarization (p- wave) applies to the ray polarization vector component that is parallel to the plane of incidence. The raytracer automatically computes the plane of incidence at each interface, decomposes the polarization vector into TE and TM components, and applies the respective reflection and transmission coefficients to these TE and TM components. However, phase information is not captured. Therefore, raytracing is not suitable for use in modeling wave interferences.

100% 2.1%

Figure 23. Pyramids help to bounce light rays in lateral directions so that a greater portion of the ray power is transmitted into the solar cell.

Modernsolar-celldesignsencompasstextured surfaces because they help to entrap light through lateral reflection (see, for example, the pyramidal texturing in Figure 23). Alternative designs involve the inverted pyramid structure (see Figure 24).

G [cm–3 s–1] 1.0e+21

1.0e+20

1.0e+19

1.0e+18

1.0e+17

1.0e+16

Figure 24. Raytracing simulation of optical generation in a 3D inverted pyramid thin-film solar cell. Light impinges from the bottom through a transparent oxide.

The transmission of light into solar cells can be enhancedfurtherwiththinfilmsofantireflective coatings that are commonly deposited on the top surface. The thin films cause wave interferences that can be modeled accurately by the transfer matrix method (TMM). The new raytracer incorporates the TMM to model antireflection-coated solar cells with better accuracy.

Rough surfaces are also commonly used to scatter light into solar cells. To model the diffusive rough surface scattering, the physical model interface (PMI) feature of the new raytracer can be used to implement a Phong distribution model [24]. In instances where rays are scattered randomly, the new raytracer also includes a Monte Carlo–type raytracing methodology to compute the aggregate solution of the raytracing process.

The concept of Monte Carlo raytracing follows that of the Monte Carlo method for carrier transport simulation. Suppose a ray impinges on an interface. In the deterministic

TCAD News September 2008

 

TCAD News

framework, the ray splits into a reflected part and a transmitted part at a material interface. In the Monte Carlo framework, only one ray path is tracked, and the reflectivity is taken as a probability constraint to decide if the ray is to be reflected or transmitted. As more rays impinge on this material interface, the aggregate number of reflected rays will recover information about the reflectivity. This is the principle of the Monte Carlo method. Similarly, rough surface scattering gives an angular probability and, using the same strategy, the ensemble average of rays models the physics of rough surface scattering.

With the inclusion of TMM wave models and a versatile PMI capability, the new raytracer is wellpositionedtoperformfastprototypingand design optimization of modern solar cells.

Other New Features in Sentaurus Device

Beyond the major new features in Sentaurus Device previously described, several other features have also been implemented and include:

New models accounting for stress-induced changes to the carrier effective mass and density-of-states.

A significant extension of the list of models that allow their parameters to be mole fraction–dependent.

Enhancements to the robustness and efficiency of the continuation method provided by implementation of dynamic load-line technique.

Improved initial convergence after file loading and in subsequent quasistationary or transient commands.

There is also a new unified optical interface to standardize input and output parameters for different optical methods (TMM, EMW, and EMW-X) and a new PMI treatment of the spatial distribution of heavy ions in singleevent upset (SEU) modeling.

IC WorkBench EV Plus – TCAD Sentaurus Interface

TCAD Sentaurus Version A-2008.09 features a new interface to Synopsys’ IC WorkBench EV Plus (ICWBEV Plus). This enables TCAD Sentaurus users to work with actual large layouts or full-chip layouts directly from designers.

ICWBEV Plus is a powerful, easy-to-use, graphical user interface (GUI)–based layout editor and viewer, which now features a dedicated Sentaurus TCAD User Mode. This mode is used to add TCAD-specific markups to the (GDSII or OASIS) layout. These markups identify the location of 1D, 2D, or 3D domains for subsequent TCAD simulations.

A stretch markup is also available, which enables the user-friendly parameterization of a layout. For example, you can parameterize the poly-layer width, which determines the gate lengthoftheMOSFETdevice,tousethelayout of a single MOSFET (with a certain drawn gate length) to perform TCAD simulations for an entire family of devices with different gate lengths for simulating the threshold voltage

Figure 25. The GUI of ICWBEV Plus showing zoomed view of a BiCMOS inverter cell. In the Sentaurus TCAD User Mode, new buttons are available in the toolbar (see red box) for adding TCADspecific markups such as 3D (highlight), 2D (gauges), and 1D (points) simulation domains, as well as a stretch markup for easy layout parameterization. Additional buttons (see blue box) save the Markup file and TCAD Layout file.

Figure 26. The new ICWBEV Plus – Sentaurus interface enables layout-driven process simulations in which various actual or composite devices are simulated in 3D, 2D, or 1D from a single process flow description (with a minimal number of device-dependent and dimension-dependent control statements) simply by selecting the respective simulation domain from the TCAD Layout file. A Sentaurus Workbench project is shown, together with representative simulation results.

roll-off curve. ICWBEV Plus also supports a feature-rich Tcl-based macro language that adds virtually unlimited possibilities for parameterizing layers of interest.

Rotating the layout in ICWBEV Plus makes it possible to perform TCAD simulations along an axis that is not aligned to the major axis of the layout. Furthermore, the ICWBEV Plus

– Sentaurus interface supports so-called composite simulation domains.

For example, to make efficient use of the chip “real estate” in a modern BiCMOS cell layout, the emitter, the base, and the collector are often arranged in a two-dimensional pattern. Therefore, it may not be possible to define a single 2D simulation domain, which is restricted to a straight line, to include all three contacts.

Composite simulation domains address this problem by allowing the definition of several independent 2D simulation domains, in this case, for the emitter–base and the base–collector regions. During the TCAD simulation, the two (or more) distinct 2D simulation domains are concatenated to form an effective, electrically functional, 2D device cross section, by simply activating more than one simulation domain during the TCAD simulation with Sentaurus Process.

Thenewinterfacealsofeaturesenhancements to enable layout-driven process simulations. These features include the possibility to control the placement of mesh refinement boxes as well as the placement of electrical contacts for subsequent device simulations using actual or auxiliary layers in the layout. These features make it convenient to generate a single simulation process flow for different devices on a chip with a minimal number of control statements.

For example, for a BiCMOS inverter cell, you may want to perform TCAD simulations for NMOS and PMOS transistors as well as the n-p-n bipolar transistor. By automatically refining the area under the poly mask from the GDSII layout, the meshing of the critical channel area of the MOS devices and the critical emitter–base junction area can be resolved without “if-else” control statements. This considerably improves the readability of the TCAD simulation process flow.

By placing an auxiliary “markup” layer in the layout, users can indicate where electrical contacts for subsequent device simulations are placed. By default, the name of the auxiliary layer is used as the name of the contact. This makes it possible to use the same TCAD simulation process flow for assigning contacts to the MOS and bipolar devices.

Mask Segment

Mask and Oversize

Figure 27. A key feature of layout-driven process simulations is the possibility to refine the area underneath a selected layer. Here, the mesh under the poly layer is refined, which corresponds to the channel region of the NMOSFET in a BiCMOS inverter cell. By specifying a nonzero “oversize” parameter, the refined area is extended to account for, for example, a diffused profile beyond the actual mask opening. The same poly layer–based meshing adds refinement in the base–emitter area of the corresponding bipolar device (not shown).

The new ICWBEV Plus – Sentaurus interface makes Sentaurus Process and Sentaurus Structure Editor directly layout aware. The Ligament functionality available in Sentaurus Workbench Advanced is not needed to transfer layout information to Sentaurus Process when using the ICWBEV Plus

– Sentaurus interface. However, Ligament can still be used as a convenient user interface for Sentaurus Process.

A typical work flow starts with the (GDSII or OASIS) layout, which may cover an entire cell or a full chip, in flat or hierarchical format. The layout is loaded into ICWBEV Plus where the user adds the TCAD-relevant additional markups (simulation domains and possible auxiliary layers for contact mesh placement). The markups and additional layers are saved in a Markup file, which may be reloaded later to add new markups or to edit existing ones.

Finally, the so-called TCAD Layout file is saved from ICWBEV Plus. This file contains all of the information relevant to the subsequent Sentaurus simulations, particularly all TCAD simulation domains, as well as the layer segments or polygon associated with each of the simulation domains. Other information not relevant to the TCAD simulation domains is not included in the TCAD Layout file. Therefore, even when starting with a large GDSII full-chip layout, the final TCAD Layout file will be relatively small. Sentaurus Process or Sentaurus Structure Editor works with this TCAD Layout file without invoking ICWBEV Plus itself.

ICWBEV Plus has supported the Sentaurus TCAD User Mode since Version A 2007.12SP1. It is distributed and licensed independently of the TCAD Sentaurus tool suite.

Usability Enhancements in Sentaurus Workbench and Sentaurus Workbench Advanced

Advanced Copy-and-Paste Operations

Sentaurus Workbench makes simulation setup easier by introducing the capability to copy and paste parts of the tool flow between Sentaurus Workbench projects.

This data exchange allows the reuse of parts of the simulation flow. Copy and paste operations can be called inside the same Sentaurus Workbench instance, as well as between two different projects loaded in separate Sentaurus Workbench instances. The following items can be copied and pasted between projects:

Tools

Parameters

Global variables

Nodes

Experiments

Pasted tool steps are inserted after the selected tool step in the target project, together with the parameters, their values, and user-defined variables set on the nodes of the resulting parametric variation. The command files, parameter files, preference files, and other input information are delivered with the pasted tool instances.

Pasted parameters are inserted after the selected parameter, together with their values. Pasting parameters into an empty target project automatically creates the corresponding tool instance.

The copied global variables are inserted after the selected variable, together with their values. Sentaurus Workbench allows the copy and paste of node information. It includes the value of the corresponding parameter and the values of global variables set up on this node. Only nodes of parametric steps can be involved.

Sentaurus Workbench also enhances copying and pasting of experiments. Now, it requires that source and target projects have

 

TCAD News September 2008

XVqXV

TCAD News

the same parameterization. If experiments are pasted into an empty target project, the corresponding infrastructure (tool instances and parameters) is created automatically.

Copy and Paste of Process Steps in

Sentaurus Workbench Advanced

The Ligament Flow Editor available as part of Sentaurus Workbench Advanced allows easy data exchange inside the same process flow or between flows loaded in separate instances of Ligament Flow Editor.

Arbitrary process steps can be copied in the source Ligament process flow and pasted into the target process flow. Ligament Flow Editor automatically creates all source macro and variable definitions, which are used in the copied flow part and do not exist yet in the target project.

User-Imposed Running Restrictions

Sentaurus Workbench allows control of the number of simultaneously running tools as well as effective and flexible license-sharing between users within a group by specifying self-imposed restrictions on the maximum number of simultaneously running simulations of a certain tool.

Beingappliedinsideagroup,theserestrictions provide a fair license distribution of available licenses between engineers, as well as allow for the possibility of temporary concentration of available resources for an urgent job. These settings can be performed easily by the user with no communication required with remote teams, such as IT. Users can modify run limits at any time according to typical and urgent needs.

SGE Scheduler Interface

Sentaurus Workbench introduces an interface to the Sun Grid Engine (SGE) scheduler, developed and supported by Sun Microsystems. SGE integrates a cluster of heterogeneous workstations into a single system environment and provides sophisticated job-scheduling policies. Sentaurus Workbench can be executed on an SGE cluster in exactly the same way as the DMW scheduler or LSF scheduler.

Node Explorer

The new Node Explorer dialog box keeps all node-related data and files in one place, which simplifies navigating through node files, analyzing simulation results, and tracking simulation problems (see Figure 28).

The Node Explorer allows users to:

View the properties of the node.

View the values of Sentaurus Workbench parameters, defined on the node.

View the data extracted on the node.

Navigate through the node input and output files using buttons and file patterns.

Preview text files in the text pane.

Visualize node files with viewers or editors defined in the tool database.

Synchronizing Ligament Process Flow and Sentaurus Workbench Project

This feature addresses the needs of process engineers who use Ligament to set up their process simulations. When a Ligament process flow is completed, it may contain references to Sentaurus Workbench @...@ parameters and variables, expressions, and #split directives. Instead of manually creating the necessary parameters in the Sentaurus Workbench project, Sentaurus Workbench allows users to automatically create these parameters by synchronizing the Ligament process flow with its Sentaurus Workbench project.

Sentaurus Workbench analyzes the Ligament process flow to find all the Sentaurus Workbench parameters and variables enclosed in @...@ delimiters, together with the corresponding process names, such as first-level macro calls (recipes) in the root process flow.

References

[1]K. Mistry et al., “A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging,” in IEDM Technical Digest, Washington, DC, USA, pp. 247–250, December 2007.

[2]X. Chen et al., “A Cost Effective 32nm High-K/ Metal Gate CMOS Technology for Low Power Applications with Single- Metal/Gate-First Process,” in Symposium on VLSI Technology, Honolulu, HI, USA, pp. 88–89, June 2008.

[3]S. D. Suk et al., “TSNWFET for SRAM cell application: Performance Variation and Process Dependency,”in Symposium on VLSI Technology, Honolulu, HI, USA, pp. 38–39, June 2008.

[4]X. Sun et al., “Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the Roadmap,” IEEE Electron Device Letters, vol. 29, no. 5, pp. 491–493, 2008.

[5]“Sentaurus Suite of TCAD Products in Version X-2005.10,” TCAD News, p. 2, October 2005.

[6]“Features and Enhancements in Sentaurus Version Z-2007.03,” TCAD News, p. 2, March 2007.

[7]L. Csepregi et al., “Substrate-orientation dependence of the epitaxial regrowth rate from Si-implanted amorphous Si,”Journal of Applied Physics, vol. 49, no. 7, pp. 3906–3911, 1978.

[8]L. Pelaz, L. A. Marqués, and J. Barbolla, “Ion-beam-induced amorphization and recrystallization in silicon,” Journal of Applied Physics, vol. 96, no. 11, pp. 5947–5976, 2004.

Figure 28. Node Explorer dialog box.

[9]G. L. Olson and J. A. Roth, “Kinetics of Solid Phase Crystallization in Amorphous Silicon,” Materials Science Reports, vol. 3, no. 1,

pp.1–77, 1988.

[10]G. Impellizzeri et al., “Fluorine in preamorphized Si: Point defect engineering and control of dopant diffusion,” Journal of Applied Physics, vol. 99, p. 103510, May 2006.

[11]“Building on Predictable Success: New Features and Enhancements in TCAD Sentaurus Version Y-2006.06,” TCAD News, p. 1, June 2006.

[12]“Features and Enhancements in Sentaurus Version Z-2007.03,” TCAD News, pp. 3–4, March 2007.

[13]I.Martin-Bragado,N.Zographos,andM.Jaraiz,“LongandDouble Hop kinetic Monte Carlo: Techniques to speed up atomistic modeling without losing accuracy,” in E-MRS Symposium Proceedings, Front-End Junction and Contact Formation in Future Silicon/Germanium Based Devices, Strasbourg, France, 2008 (in press).

[14]N.ZographosandI.Martin-Bragado,“AComprehensiveAtomistic Kinetic Monte Carlo Model for Amorphization/Recrystallization and its Effects on Dopants,” in MRS Symposium Proceedings, Doping Engineering for Front-End Processing, vol. 1070, San Francisco, CA, USA, p. 1070-E03-01, March 2008.

[15]P.Castrilloetal.,“AtomisticModelingofDefectDiffusioninSiGe,” in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Vienna, Austria, pp. 9–12, September 2007.

[16]I. Martin-Bragado et al., “From point defects to dislocation loops: A comprehensive modelling framework for self-interstitial defects in silicon,” Solid-State Electronics, vol. 52, no. 9,

pp.1430–1436, 2008.

[17]I. Martin-Bragado et al., “Anisotropic dopant diffusion in Si under stress using both continuum and atomistic methods,” Journal of Computational Electronics, vol. 7, no. 3, September 2008.

[18]V. Moroz et al., “Dissolution of extended defects in strained silicon,” Journal of Vacuum Science & Technology B, vol. 26, no. 1, pp. 439–442, 2008.

[19]V. Moroz et al., “Modeling Evolution of Temperature, Stress, Defects, and Dopant Diffusion in Silicon During Spike and Millisecond Annealing,” in MRS Symposium Proceedings, Doping Engineering for Front-End Processing, vol. 1070, San Francisco, CA, USA, p. 1070-E06-06, March 2008.

[20]“New Features and Enhancements in TCAD Sentaurus Version A-2007.12,” TCAD News, pp. 3–4, December 2007.

[21]V.Sverdlovetal.,“EffectsofShearStrainontheConductionBand in Silicon: An Efficient Two-Band k.p Theory,” in Proceedings of the 37th European Solid-State Device Research Conference (ESSDERC), Munich, Germany, pp. 386–389, September 2007.

[22]E. Ungersboeck et al., “The Effect of General Strain on the Band Structure and Electron Mobility of Silicon,”IEEE Transactions on Electron Devices, vol. 54, no. 9, pp. 2183–2190, 2007.

[23]M. M. Rieger and P. Vogl, “Electronic-band parameters in

strained Si1–xGex alloys on Si1–yGey substrates,” Physical Review B, vol. 48, no. 19, pp. 14276–14287, 1993.

[24]J. D. Foley et al., Computer Graphics: Principles and Practice, Boston: Addison Wesley, The Systems Programming Series, 2nd ed., 1997.

Taurus™ Enhancements: TSUPREM-4™ and Medici Version A-2008.09

TSUPREM-4

Vacancy Clustering

Recently, vacancy engineering has been extensively investigated to meet the strict requirements at the 45-nm process node and beyond for source and drain shallow junction formation and sheet resistance. The formation of a vacancy-rich layer by silicon high-energy implantation [1] or the formation of voids as a vacancy source by helium implantation [2][3] has been reported for the techniques aiming to reduce diffusion and increase activation. To simulate this type of vacancy engineering, the full dynamics of vacancy clustering from nanovoids to large voids are modeled in TSUPREM-4 Version A-2008.09 by:

Vi + Vj ↔ V2 + (i + j)p

Vn + Vi ↔ Vn+1 + ip

Vn + Ii ↔ Vn–1 + ip

Vmax–1 + Vi ↔ VL + ip

VL+ V ↔ VL

VL + I ↔ VL

where the subscripts ‘n’ and ‘max’ denote the size of a small vacancy cluster and its maximum size, respectively, and ‘L’ denotes large size. The large vacancy clustering model uses a single equation to calculate the total number of vacancies bound in clusters.

Figure 1 shows the comparison of the simulation results with the measured data [4]. Voids are formed at approximately 400 nm below the surface by the helium Monte Carlo implantation.

Then, boron atoms are implanted with 3x1015 cm–2 0.5 keV, which is followed an anneal at 1000°C for 10 s. During the thermal process, vacancy clusters (voids) play a role as a vacancy source by Ostwald ripening. Vacancies diffuse towards the silicon surface where boron diffusion occurs, reducing the interstitial supersaturation and transientenhanced diffusion (TED).

F–V Clustering

In earlier versions of TSUPREM-4, the dopant–defect clustering model did not allow the reaction with direct-diffusing species such as fluorine, which is defined by ^PD.PAIR in

the IMPURITY statement. In TSUPREM-4 Version A-2008.09, the following dopant– defect clustering reactions have been newly added to the DDC.FULL model. For directdiffusing species, X:

Xz + Xz ↔ Xq2X2 + (2z – qX2)p

Xz + Ij ↔ XIqXI + (z + j – qXI)p Xz + Vj ↔ XVqXV + (z + j – qXV)p

+ Ij ↔ Xz + (qXV + j – z)p

XIqXI + Vj ↔ Xz + (qXI + j – z)p Xn Imi + Xj ↔ Xn+1Ikm + (i + j – k)p

XnVmi + Xj ↔ Xn+1Vmk + (i + j – k)p

where XI and XV are not pairs but clusters. This enhancement enables users to simulate the full dynamics of F–V clusters.

Dual-Pearson Moment Extraction

In previous versions, users could extract the dual-Pearson moments from SIMS data using the optimization capability. However, writing the input file was not easy for novices.

TSUPREM-4 Version A 2008.09 provides a convenient syntax for this purpose:

MOMENT SILICON SIMS.FIL=Bsims.dat FIT

The command fits a dual-Pearson distribution to the given SIMS and shows the extracted dual-Pearson moments. Switching on the MOMENT parameter in the IMPLANT statement specifies the use of the extracted moments in the latest MOMENT statement. If FIT is not specified in the MOMENT statement, the IMPLANT command directly imports the SIMS data instead of calculating the profile with the Pearson model. This enhancement applies only to the Taurus analytic implant model. For example:

MOMENT SILICON SIMS.FIL=Bsims.dat FIT

IMPLANT BORON DOSE=1E14 ENERGY=0.5 NAME=Taurus MOMENT

Speed Enhancement in Epitaxy

TSUPREM-4 simulates epitaxy by a series of deposition and diffusion steps of silicon layers. The starting time step for diffusion of

TCAD News September 2008

 

TCAD News

each layer is determined by INIT.TIM in the METHOD statement. However, when the deposited layer is sufficiently thin, the last time step of the previous layer can be used for the initial time step of the current layer without loss of simulation accuracy, but with better speed performance. This feature is switched on by specifying the CONTINUE parameter in the EPITAXY command.

Medici

In Version A-2008.09, enhancements have been made to Medici to improve the accuracy of band-to-band tunneling at heterojunctions. When using the BT.MODEL=3 option for the BTBT model, the program evaluates a path integral along the tunneling path that replaces the argument of the exponential in the band- to-band tunneling generation expression.

For Version A-2008.09, this path integral now accounts for changes in the reduced tunneling mass that occur at heterojunctions (the reduced tunneling mass is included implicitly as an mr1/2 factor in the B.BTBT parameter associated with each material). In addition, when using the nonlocal band-to-band tunneling model, the program now accounts for changes in NC, NV, and lattice temperature along the tunneling path. Changes in these

quantities can affect the threshold condition that determines if enough band-bending has occurred for band-to-band tunneling to take place.

A change has also been made to Medici related to calculating shear strain components that are used in strain-dependent models. The program previously calculated and used what is known as engineering shear strain. However,themodelequationsrequirephysical shear strain, which is a factor of two smaller than engineering shear strain. This correction improves the accuracy of simulations that depend on shear strain.

References

[1]N. E. B. Cowern et al., “Understanding, Modeling and Optimizing Vacancy Engineering for Stable Highly Boron-Doped Ultrashallow Junctions,” in IEDM Technical Digest, Washington, DC, USA, December 2005.

[2]S. Mirabella et al., “Role of surface nanovoids on interstitial trapping in He implanted crystalline Si,” Applied Physics Letters, vol. 88, p. 191910, May 2006.

[3]O. Marcelot et al., “Diffusion And Activation of Ultra Shallow Boron Implants In Silicon In Proximity Of Voids,” Solid State Phenomena, vol. 131-133, pp. 357–362, 2008.

[4]O. Marcelot et al., “Effect of voids-controlled vacancy supersaturations on B diffusion,” Nuclear Instruments and Methods in Physics Research B, vol. 257, no. 1-2, pp. 249–252, 2007.

 

22

 

 

 

 

Boron 0.5 keV 3e15 cm–2 + 1000°C 10 s

 

 

 

 

 

 

 

21

 

 

 

 

 

 

 

 

 

20

 

 

 

 

 

 

 

 

[cm–3]

 

 

 

 

 

 

 

 

 

log(Boron)

19

 

 

 

 

 

 

 

 

 

 

 

with voids

without voids

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

 

 

 

 

 

 

 

 

 

 

 

as-implanted

 

 

 

 

 

 

17

 

 

 

 

 

 

 

 

 

16

0

0.02

0.04

0.06

0.08

0.10

0.12

0.14

 

 

 

 

 

 

Y [μm]

 

 

 

Figure 1. Vacancy clustering example: reduction of boron TED by voids as vacancy source. Data from Marcelot et al. [4].

TCAD Sentaurus in the Newsroom

The following excerpts are from news

from Synopsys are an important part of our

simulating etching and deposition in the

Sentaurus tools, and that’s why we will be

releases that have been published by

ability to do just that,” said Herb Erhardt,

development of next-generation devices. As

using it for our daily work in optimizing and

Synopsys, Inc. with regard to developments

manager of Kodak’s CMOS Image Sensor

a result, Toshiba is able to reduce research

characterizing next-generation devices.”

and implementations of TCAD Sentaurus.

business, within the company’s Image Sensor

and development time and trial production

The TCAD Sentaurus platform provides a

 

Solutions group.

 

 

costs, while optimizing next-generation

comprehensive capability to simulate detailed

Synopsys’ TCAD Sentaurus Enables

“Asinmanyothermicroelectronicsareas,image

device structures and yield, by quantitatively

andrealisticprocessstructuresforsubsequent

sensor design has become highly complex,

estimating process margin before and during

electrical analysis by Sentaurus Device. In

Development of Kodak’s New Image

requiring advanced physics-based simulation

volume production.

 

 

 

 

 

 

addition to the core etching and deposition

Sensor Products

 

 

 

 

 

 

tools to understand the propagation of light

With shrinking device feature sizes, physically

models, Synopsys and Toshiba have been

June 18, 2008

through light-absorbing elements (pixels) and

based simulation

of

deposition,

etching,

collaborating to incorporate Toshiba’s surface

Synopsys, Inc. announced that Kodak, a

its interaction with the electronics within the

and other topographic processes becomes

reaction kinetics modeling technology into

world leader in image sensor technology,

device,” said Terry Ma, vice president, TCAD

increasingly important because even minor

Sentaurus

Topography, allowing specific

has adopted Synopsys’ TCAD Sentaurus

R&D at Synopsys. “Deployment of Sentaurus

changes to device shapes can have a major

gas chemistries to be included as part of

simulationsoftwaretosupportitsresearchand

at an industry-leading company like Kodak is

impact on process margin and electrical

the simulation of topography-modifying

development of new image sensor products.

an important affirmation of our capability in

performance for many kinds of device.

processes.

 

 

The electronic “eyes” that convert light into

coupling optical and electrical simulation to

Moreover, deposition and etching processes

“Physical etching and deposition simulation

electrical signals in digital cameras and other

economically characterize and optimize the

can also impact macroscopic features due

is a key component in our roadmap for

imaging devices, image sensors, are made up

design of image sensors.”

 

to microloading effects. TCAD Sentaurus

addressing

advanced process technologies

of many individual picture elements or pixels.

Kodak’s Image Sensor Solutions group

software,

specifically

Sentaurus

Process

and device structure designs,” said Terry

The trend towards higher resolution and

(ISS), a leader in the development of high-

and Sentaurus Device, use detailed physical

Ma, group director, TCAD R&D at Synopsys.

improved light sensitivity requires increasingly

performance image sensors for the past

models for simulating the fabrication process

“The advanced surface kinetics modeling

complex and smaller pixel designs, inspiring a

three decades, builds some of the highest

and electrical behavior of a wide range of

technology we obtained from Toshiba

new generation of products with higher-quality

resolution and widest dynamic range sensors

semiconductor devices and are used broadly

represents a great collaboration, bringing key

images and functionality, and prompting the

currently available on the market, enabling

in the research, development, and optimization

technological advances in physical modeling

need for advanced simulation tools to support

state-of-the-art digital imaging cameras for a

of semiconductor

technologies. Sentaurus

to the TCAD community.”

product development.

variety of customers. Kodak has relied on the

Topography extends these capabilities to

 

 

 

TheTCADSentaurusproductfamilycomprises

use of precision process, device, and optical

physical etching and deposition.

 

 

 

 

 

 

simulation tools to assist in the development

“We

have recognized

for

many

years

 

 

 

2D and 3D process and device simulation

of its image sensor products.

 

the

importance

of physical

etching

and

 

 

 

tools used for exploring and optimizing

Toshiba Adopts Synopsys TCAD

deposition

simulation

in

developing

our

 

 

 

semiconductortechnologies.TCADSentaurus

 

 

 

process technologies. With TCAD being an

 

 

 

includes a full-wave electromagnetic solver to

Sentaurus Simulation for Development

 

 

 

essential part of our technology development,

 

 

 

handle the diffraction and polarization of light

of Next-Generation Device

 

 

 

 

 

we have been able to reduce trial production

 

 

 

in modern pixels.

Technologies

 

 

 

 

 

 

 

cost and improve device yield,” said Shigeru

 

 

 

“Kodak’s focus is on designing highly

April 23, 2008

 

 

 

 

 

 

 

Komatsu, Toshiba Semiconductor Company’s

 

 

 

advanced image sensors with ultra-low-

Synopsys, Inc. announced that Toshiba

chief knowledge officer. “We are happy

 

 

 

light performance, high-speed video and

Semiconductor

Company

has adopted

with

Sentaurus

Topography’s

performance,

 

 

 

manufacturability. The TCAD Sentaurus tools

Synopsys’ TCAD

Sentaurus

software for

accuracy,

and integration

with

other TCAD

 

 

 

 

 

 

700 East Middlefield Road, Mountain View, CA 94043, USA www.synopsys.com Synopsys and the Synopsys logo are registered trademarks, and Taurus and TSUPREM-4 are trademarks of Synopsys, Inc.

All other products or service names mentioned herein are trademarks of their respective holders and should be treated as such. © 2008 Synopsys, Inc. All rights reserved. 09/08.DGS.1000