ADC12020
SNAS186B –APRIL 2003 –REVISED MARCH 2013 www.ti.com
ADC12020 TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VA = VD = 5V, VDR = 3.0V, fCLK = 20 MHz, fIN = 10.1 MHz, VREF = 2.0V unless otherwise stated
Spectral Response, 44 MHz Input Spectral Response, 10.1 MHz Input
Figure 34. |
Figure 35. |
Spectral Response |
IMD @ F1 = 9.5MHz, F2 = 10.5MHz |
Figure 36. |
Figure 37. |
Functional Description
Operating on a single +5V supply, the ADC12020 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. The differential analog input signal is digitized to 12 bits.
The reference input is buffered to ease the task of driving that pin. The output word rate is the same as the clock frequency. The analog input voltage is acquired at the rising edge of the clock and the digital data for a given sample is delayed by the pipeline for 6 clock cycles.
A logic high on the power down (PD) pin reduces the converter power consumption to 40 mW.
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