LC7985NA, LC7985ND
Functional Description
Registers
The LC7985 has two 8-bit registers—instruction register (IR) and data register (DR)—that are selected as shown in the following table.
RS |
R/W |
Operation |
|
|
|
0 |
0 |
IR write, instruction execution |
|
|
|
0 |
1 |
Busy flag (DB7) and address counter (DB0 to DB6) output |
|
|
|
1 |
0 |
DR write, internal DR to DD RAM or CG RAM data transfer |
|
|
|
1 |
1 |
DR read, internal DD RAM or CG RAM to DR data transfer |
|
|
|
The instruction register is write-only. It contains instruction codes or DD RAM and CG RAM addresses written by the microcontroller.
The data register holds data read from or written to either DD RAM or CG RAM. Data written to the data register by the microcontroller is automatically transferred to the current DD RAM or CG RAM address. Data read from DD RAM or CG RAM is buffered in the data register.
When the microcontroller writes a DD RAM or CG RAM address to the instruction register, the data at that address is copied into the data register. The microcontroller then reads the data in the data register to complete the transfer. Once that data is read, the data from the next DD RAM or CG RAM address is copied into the data register in preparation for the next data read.
Busy Flag
When busy flag is 1, the previous instruction is executing, and when 0, the instruction has completed. The next instruction cannot be received until BF is 0. The microcontroller should, therefore, confirm that BF is 0 before writing the next instruction.
Display Data RAM (DD RAM)
The display data RAM stores 80, 8-bit character codes, and the LC7985 can display a maximum of 80 characters. The address counter contains the location for the next display memory read or write operation as shown in the following figure.
Display data addresses are in hexadecimal. For example, the address counter contents for location 4E are shown in the following figure.
To prevent undesirable effects such as display flicker during DD RAM accesses, the internal memory and the microprocessor interface have separate timing signals.
Address Counter
The address counter is used for both the DD RAM and the CG RAM. The address output on DB0 to DB7 is the counter value before the currently executing instruction began.
No. 3255—8/30
LC7985NA, LC7985ND
Single-line display mode (N = 0)
The DD RAM addresses and their corresponding display positions for an 80-character display are shown in the following figure.
A single LC7985, however, can drive up to eight characters. The display positions and DD RAM addresses for an unshifted 8-character display are shown in the following figure.
The DD RAM addresses following left and right display shifts are shown in the following figure. Note that the displayed characters wrap around from addresses 4FH to 00H.
An LC7985 and a single LC7930N can drive a 16-character display. The display positions and DD RAM addresses for an unshifted display are shown in the following figure.
The DD RAM addresses following left and right display shifts are shown in the following figure.
The number of displayed characters can be increased by adding more LC7930Ns. An LC7985 and nine LC7930Ns can drive an 80-character display as shown in the following figure.
No. 3255—9/30
LC7985NA, LC7985ND
Two-line display mode (N = 1)
The DD RAM addresses and their corresponding display positions for a 2-line × 40-character display are shown in the following figure. Note that the address counter automatically increments from 27H to 40H.
A single LC7985, however, can drive up to eight characters per line. The display positions and DD RAM addresses for an unshifted, 2-line × 8-character display are shown in the following figure.
The display positions following a left or right display shift are shown in the following figure. Note that the display shift is simultaneous for both lines, regardless of which line the cursor is in.
An LC7985 and a single LC7930N can drive a 2-line × 16-character display. The display positions and DD RAM addresses for an unshifted, 2-line × 16-character display are shown in the following figure.
The DD RAM addresses following left and right display shifts are shown in the following figure.
No. 3255—10/30
LC7985NA, LC7985ND
The number of displayed characters can be increased by adding more LC7930Ns. An LC7985 and four LC7930Ns can drive a 2-line × 40-character display as shown in the following figure.
Character Generator ROM (CG ROM)
The character generator ROM contains 160, 5 × 7-pixel bitmaps and 32, 5 × 10-pixel bitmaps as shown in the following figure. The characters are selected by their 8-bit character code.
Character Generator RAM (CG RAM)
The character generator RAM stores user-defined bitmaps for either eight, 5 × 7-pixel characters or four, 5 × 10-pixel characters. To display character patterns stored in CG RAM, write the character codes, shown in the leftmost column of the following figure, on DD RAM.
No. 3255—11/30