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Features

•High-performance, Low-power AVR® 8-bit Microcontroller

•Advanced RISC Architecture

–130 Powerful Instructions – Most Single Clock Cycle Execution

–32 x 8 General Purpose Working Registers

–Fully Static Operation

–Up to 8 MIPS Throughput at 8 MHz

–On-chip 2-cycle Multiplier

•Program and Data Memories

–16K Bytes of Nonvolatile In-System Programmable Flash Endurance: 1,000 Write/Erase Cycles

–Optional Boot Code Memory with Independent Lock Bits Self-programming of Program and Data Memories

–512 Bytes of Nonvolatile In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles

–1K Byte of Internal SRAM

–Programming Lock for Software Security

•Peripheral Features

–Two 8-bit Timer/Counters with Separate Prescaler and PWM

–Expanded 16-bit Timer/Counter System with Separate Prescaler, Compare, Capture Modes and Dual 8-, 9-, or 10-bit PWM

–Dual Programmable Serial UARTs

–Master/Slave SPI Serial Interface

–Real-time Counter with Separate Oscillator

–Programmable Watchdog Timer with Separate On-chip Oscillator

–On-chip Analog Comparator

•Special Microcontroller Features

–Power-on Reset and Programmable Brown-out Detection

–External and Internal Interrupt Sources

–Three Sleep Modes: Idle, Power-save and Power-down

•Power Comsumption at 4 MHz, 3.0V, 25°C

–Active 3.0 mA

–Idle Mode 1.2 mA

–Power-down Mode < 1 µA

•I/O and Packages

–35 Programmable I/O Lines

–40-lead PDIP and 44-lead TQFP

•Operating Voltages

–2.7V - 5.5V for the ATmega161L

–4.0V - 5.5V for the ATmega161

•Speed Grades

–0 - 4 MHz for the ATmega161L

–0 - 8 MHz for the ATmega161

•Commercial and Industrial Temperature Ranges

8-bit Microcontroller with 16K Bytes of In-System Programmable Flash

ATmega161

ATmega161L

Rev. 1228B–09/01

1

Pin Configuration

PDIP

(OC0/T0) PB0

 

1

40

 

VCC

 

 

(OC2/T1) PB1

 

2

39

 

PA0 (AD0)

 

 

(RXD1/AIN0) PB2

 

3

38

 

PA1 (AD1)

 

 

(TXD1/AIN1) PB3

 

4

37

 

PA2 (AD2)

 

 

 

 

 

 

 

 

 

 

 

 

(SS) PB4

 

5

36

 

PA3 (AD3)

 

 

(MOSI) PB5

 

6

35

 

PA4 (AD4)

 

 

(MISO) PB6

 

7

34

 

PA5 (AD5)

 

 

(SCK) PB7

 

8

33

 

PA6 (AD6)

 

 

 

 

 

 

 

 

 

 

9

32

 

 

 

 

RESET

 

 

PA7 (AD7)

 

 

(RXD0) PD0

 

10

31

 

PE0 (ICP/INT2)

 

 

(TXD0) PD1

 

11

30

 

PE1 (ALE)

 

 

(INT0) PD2

 

12

29

 

PE2 (OC1B)

 

 

(INT1) PD3

 

13

28

 

PC7 (A15)

 

 

(TOSC1) PD4

 

14

27

 

PC6 (A14)

 

 

(OC1A/TOSC2) PD5

 

15

26

 

PC5 (A13)

 

 

 

 

 

16

25

 

PC4 (A12)

 

(WR)

PD6

 

 

 

 

PD7

 

17

24

 

PC3 (A11)

(RD)

 

 

 

 

 

XTAL2

 

18

23

 

PC2 (A10)

 

 

 

XTAL1

 

19

22

 

PC1 (A9)

 

 

 

 

 

GND

 

20

21

 

PC0 (A8)

 

 

 

 

 

 

 

 

 

 

 

 

TQFP

PB4 (SS)

PB3 (TXD1/AIN1)

PB2 (RXD1/AIN0)

PB1 (OC2/T1)

PB0 (OC0/T0)

NC*

VCC

PA0 (AD0)

PA1 (AD1)

PA2 (AD2)

PA3 (AD3)

44

43

42

41

40

39

38

37

36

35

34

(MOSI) PB5 1 (MISO) PB6 2 (SCK) PB7 3

RESET 4 (RXD0) PD0 5 NC* 6 (TXD0) PD1 7 (INT0) PD2 8 (INT1) PD3 9

(TOSC1) PD4 10 (OCIA/TOSC2) PD5 11

12

13

14

15

16

17

18

19

20

21

22

(WR) PD6

 

(RD) PD7

XTAL2

XTAL1

GND

NC*

(A8) PC0

(A9) PC1

(A10) PC2

(A11) PC3

(A12) PC4

 

 

 

 

 

 

 

 

33 PA4 (AD4)

32 PA5 (AD5)

31 PA6 (AD6)

30 PA7 (AD7)

29 PE0 (ICP/INT2)

28 NC*

27 PE1 (ALE)

26 PE2 (OC1B)

25 PC7 (A15)

24 PC6 (A14)

23 PC5 (A13)

* NC = Do not connect

(Can be used in future devices)

2 ATmega161(L)

1228B–09/01

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