
- •Features
- •Pin Configuration
- •Disclaimer
- •Description
- •Pin Descriptions
- •AVCC
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •XTAL1
- •XTAL2
- •SRAM Data Memory
- •I/O Direct
- •Data Direct
- •Data Indirect with Displacement
- •Data Indirect
- •EEPROM Data Memory
- •I/O Memory
- •Status Register – SREG
- •Stack Pointer – SP
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Internal PLL for Fast Peripheral Clock Generation – clkPCK
- •Clock Sources
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Interrupt Handling
- •Interrupt Response Time
- •External Interrupt
- •Pin Change Interrupt
- •Idle Mode
- •ADC Noise Reduction Mode
- •Power-down Mode
- •Standby Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Timer/Counters
- •Timer/Counter0 Prescaler
- •Timer/Counter1 Prescaler
- •8-bit Timer/Counter0
- •Timer/Counter0 – TCNT0
- •8-bit Timer/Counter1
- •Timer/Counter1 – TCNT1
- •Timer/Counter1 in PWM Mode
- •Watchdog Timer
- •Overview
- •Register Descriptions
- •USI Data Register – USIDR
- •USI Status Register – USISR
- •USI Control Register – USICR
- •Functional Descriptions
- •Three-wire Mode
- •SPI Slave Operation Example
- •Two-wire Mode
- •Start Condition Detector
- •Alternative USI Usage
- •4-bit Counter
- •12-bit Timer/Counter
- •Software Interrupt
- •Analog Comparator
- •Analog to Digital Converter
- •Features
- •Operation
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Register Description for I/O Ports
- •Port A Data Register – PORTA
- •Port B Data Register – PORTB
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics – Preliminary Data
- •ATtiny26/L Register Summary
- •Ordering Information(1)
- •Packaging Information
- •Data Sheet Change Log for ATtiny26
- •Changes from Rev. 1477A-03/02 to Rev. 1477B-04/02
- •Table of Contents

|
ATtiny26(L) |
|
Table of Contents |
Features................................................................................................. |
1 |
|
Pin Configuration.................................................................................. |
2 |
|
Disclaimer ............................................................................................................. |
2 |
|
Description ............................................................................................ |
3 |
|
Block Diagram ...................................................................................................... |
4 |
|
Pin Descriptions.................................................................................................... |
5 |
|
Architectural Overview......................................................................... |
6 |
|
General Purpose Register File ............................................................................. |
7 |
|
ALU – Arithmetic Logic Unit.................................................................................. |
8 |
|
In-System Programmable Flash Program Memory .............................................. |
9 |
|
SRAM Data Memory............................................................................................. |
9 |
|
Program and Data Addressing Modes................................................................ |
10 |
|
EEPROM Data Memory...................................................................................... |
14 |
|
Memory Access Times and Instruction Execution Timing ............. |
15 |
|
I/O Memory .......................................................................................... |
17 |
|
Stack Pointer – SP.............................................................................................. |
19 |
|
Reset and Interrupt Handling.............................................................................. |
20 |
|
System Clock and Clock Options ..................................................... |
25 |
|
Clock Systems and their Distribution .................................................................. |
25 |
|
Clock Sources..................................................................................................... |
27 |
|
Crystal Oscillator................................................................................................. |
28 |
|
Low-frequency Crystal Oscillator ........................................................................ |
29 |
|
External RC Oscillator ........................................................................................ |
30 |
|
Calibrated Internal RC Oscillator ........................................................................ |
31 |
|
External Clock..................................................................................................... |
32 |
|
Power Management and Sleep Modes.............................................. |
41 |
|
Minimizing Power Consumption ......................................................................... |
43 |
|
Timer/Counters ................................................................................... |
44 |
|
Timer/Counter0 Prescaler................................................................................... |
44 |
|
Timer/Counter1 Prescaler................................................................................... |
45 |
|
8-bit Timer/Counter0........................................................................................... |
45 |
|
8-bit Timer/Counter1........................................................................................... |
47 |
|
Watchdog Timer.................................................................................. |
58 |
|
EEPROM Read/Write Access............................................................. |
60 |
|
Preventing EEPROM Corruption ........................................................................ |
62 |
|
|
i |
1477B–AVR–04/02 |
|
|

Universal Serial Interface – USI......................................................... |
63 |
Overview............................................................................................................. |
63 |
Register Descriptions.......................................................................................... |
64 |
Functional Descriptions ...................................................................................... |
68 |
Alternative USI Usage ........................................................................................ |
73 |
Analog Comparator ............................................................................ |
74 |
Analog to Digital Converter ............................................................... |
77 |
Features.............................................................................................................. |
77 |
Operation ............................................................................................................ |
78 |
Prescaling and Conversion Timing ..................................................................... |
79 |
ADC Noise Canceler Function............................................................................ |
82 |
ADC Conversion Result...................................................................................... |
82 |
Scanning Multiple Channels ............................................................................... |
88 |
ADC Noise Canceling Techniques ..................................................................... |
88 |
Offset Compensation Schemes .......................................................................... |
88 |
I/O Ports............................................................................................... |
90 |
Introduction ......................................................................................................... |
90 |
Ports as General Digital I/O ................................................................................ |
91 |
Alternate Port Functions ..................................................................................... |
95 |
Register Description for I/O Ports ..................................................................... |
105 |
Memory Programming...................................................................... |
106 |
Program and Data Memory Lock Bits............................................................... |
106 |
Fuse Bits........................................................................................................... |
107 |
Signature Bytes ................................................................................................ |
108 |
Calibration Byte ................................................................................................ |
108 |
Parallel Programming Parameters, Pin Mapping, and Commands .................. |
108 |
Parallel Programming ....................................................................................... |
111 |
Serial Downloading........................................................................................... |
120 |
Serial Programming Pin Mapping ..................................................................... |
120 |
Electrical Characteristics................................................................. |
125 |
Absolute Maximum Ratings*............................................................................. |
125 |
External Clock Drive Waveforms ...................................................................... |
127 |
External Clock Drive ......................................................................................... |
127 |
ADC Characteristics – Preliminary Data......................................... |
128 |
ATtiny26 Typical Characteristics – Preliminary Data.................... |
129 |
ATtiny26/L Register Summary......................................................... |
138 |
Instruction Set Summary ................................................................. |
139 |
ii ATtiny26(L)
1477B–AVR–04/02

|
ATtiny26(L) |
Ordering Information(1)..................................................................... |
141 |
Packaging Information ..................................................................... |
142 |
20P3 ................................................................................................................. |
142 |
20S ................................................................................................................... |
143 |
32M1-A ............................................................................................................. |
144 |
Data Sheet Change Log for ATtiny26 ............................................. |
145 |
Changes from Rev. 1477A-03/02 to Rev. 1477B-04/02 ................................... |
145 |
Table of Contents .................................................................................. |
i |
iii
1477B–AVR–04/02

iv ATtiny26(L)
1477B–AVR–04/02

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