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ATtiny26(L)

 

 

 

 

Fuse Bits

 

 

The ATtiny26 has two Fuse bytes. Table 49 and Table 50 describe briefly the functional-

 

 

 

ity of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are

read as logical zero, “0”, if they are programmed.

Table 49. Fuse High Byte

Fuse High Byte

Bit No

Description

 

Default Value

 

 

 

 

 

 

 

 

 

 

7

 

1

(unprogrammed)

 

 

 

 

 

 

 

 

 

 

6

 

1

(unprogrammed)

 

 

 

 

 

 

 

 

 

 

5

 

1

(unprogrammed)

 

 

 

 

 

 

 

 

RSTDISBL

4

 

Select if PB7 is I/O pin or

1

(unprogrammed, PB7 is

 

RESET pin

 

RESET pin)

 

 

 

 

 

 

 

 

 

 

 

 

 

SPIEN(1)

3

 

Enable Serial Program

0

(programmed, SPI prog.

 

and Data Downloading

 

enabled)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EEPROM memory is

1

(unprogrammed, EEPROM not

EESAVE

2

 

preserved through the Chip

 

 

preserved)

 

 

 

 

Erase

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BODLEVEL

1

 

Brown out detector trigger

1

(unprogrammed)

 

level

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BODEN

0

 

 

1

(unprogrammed, BOD

 

Brown out detector enable

 

disabled)

 

 

 

 

 

 

 

 

 

 

 

 

Note: 1. The SPIEN Fuse is not accessible in serial programming mode.

Table 50. Fuse Low Byte

 

 

 

 

 

 

 

 

 

 

 

 

Fuse Low Byte

 

Bit No

 

Description

 

Default Value

 

 

 

 

 

 

 

 

PLLCK

 

7

 

Use PLL for internal clock

 

1

(unprogrammed)

 

 

 

 

 

 

 

 

CKOPT(3)

 

6

 

Oscillator options

 

1

(unprogrammed)

SUT1

 

5

 

Select start-up time

 

1

(unprogrammed)(1)

SUT0

 

4

 

Select start-up time

 

0

(programmed)(1)

CKSEL3

 

3

 

Select Clock source

 

0

(programmed)(2)

CKSEL2

 

2

 

Select Clock source

 

0

(programmed)(2)

CKSEL1

 

1

 

Select Clock source

 

0

(programmed)(2)

CKSEL0

 

0

 

Select Clock source

 

1

(unprogrammed)(2)

Notes: 1. The default value of SUT1..0 results in maximum start-up time. See Table 13 on page 31 for details.

2.The default setting of CKSEL3..0 results in internal RC Oscillator at 1 MHz. See Table 4 on page 27 for details.

3.The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “System Clock and Clock Options” on page 25 for details.

The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.

107

1477B–AVR–04/02

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