ADLAR = 0

Scanning Multiple

Channels

ADC Noise Canceling

Techniques

Offset Compensation

Schemes

Since change of analog channel always is delayed until a conversion is finished, the Free Running mode can be used to scan multiple channels without interrupting the converter. Typically, the ADC Conversion Complete interrupt will be used to perform the channel shift. However, the user should take the following fact into consideration:

The interrupt triggers once the result is ready to be read. In Free Running mode, the next conversioin will start immediately when the interrupt triggers. If ADMUX is changed after the interrupt triggers, the next conversion has already started, and the old setting is used.

Digital circuitry inside and outside the ATtiny26/L generates EMI which might affect the accuracy of analog measurements. If conversion accuracy is critical, the noise level can be reduced by applying the following techniques:

1.The analog part of the ATtiny26/L and all analog components in the application should have a separate analog ground plane on the PCB. This ground plane is connected to the digital ground plane via a single point on the PCB.

2.Keep analog signal paths as short as possible. Make sure analog tracks run over the analog ground plane, and keep them well away from high-speed switching digital tracks.

3.The AVCC pin on the ATtiny26/L should be connected to the digital VCC supply voltage via an LC network as shown in Figure 52.

4.Use the ADC noise canceler function to reduce induced noise from the CPU.

5.If some pins are used as digital outputs, it is essential that these do not switch while a conversion is in progress in that port.

All active gain stages and differential-to-single-ended stages in front of the ADC have a built-in offset cancellation circuitry that nulls the offset of these stages as much as possible.

In the case of unity gain differential measurements, the remaining worst case offset in the differential to single-ended stage is less than 5 mV offset (typically 3 mV), or two LSBs.

In the case of 20x gain differential measurements, the remaining worst case offset error is in the range of 10 mV in the ADC conversion result. If the internal voltage reference (2.56V) is used during conversion of differential channels, one LSB of the 10-bit ADC is 2.56 mV, i.e., the worst case error is approximately four LSBs. This error is fairly stable over short term, as temperature which is the main contributor to offset drift, varies slowly. Offset variation over the temperature range is in the order of 5 mV, i.e., approximately two LSBs.

If better offset cancellation is desired, it is possible to select the same channel for both differential input references and actually measure the offset from the complete analog path. This offset residue can then be subtracted in software from the measurement results. Using this kind of software based offset correction, offset on any channel can be reduced below one LSB.

Figure 52. ADC Power Connections

1477B–AVR–04/02

ATtiny26(L)

14 PA4 (ADC3)

13 PA5 (ADC4)

12 PA6 (ADC5/AIN0)

11 PA7 (ADC6/AIN1)

89