
- •Features
- •Pin Configuration
- •Disclaimer
- •Description
- •Pin Descriptions
- •AVCC
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •XTAL1
- •XTAL2
- •SRAM Data Memory
- •I/O Direct
- •Data Direct
- •Data Indirect with Displacement
- •Data Indirect
- •EEPROM Data Memory
- •I/O Memory
- •Status Register – SREG
- •Stack Pointer – SP
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Brown-out Detection
- •Watchdog Reset
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Internal PLL for Fast Peripheral Clock Generation – clkPCK
- •Clock Sources
- •Crystal Oscillator
- •External RC Oscillator
- •External Clock
- •Interrupt Handling
- •Interrupt Response Time
- •External Interrupt
- •Pin Change Interrupt
- •Idle Mode
- •ADC Noise Reduction Mode
- •Power-down Mode
- •Standby Mode
- •Analog to Digital Converter
- •Analog Comparator
- •Brown-out Detector
- •Internal Voltage Reference
- •Watchdog Timer
- •Port Pins
- •Timer/Counters
- •Timer/Counter0 Prescaler
- •Timer/Counter1 Prescaler
- •8-bit Timer/Counter0
- •Timer/Counter0 – TCNT0
- •8-bit Timer/Counter1
- •Timer/Counter1 – TCNT1
- •Timer/Counter1 in PWM Mode
- •Watchdog Timer
- •Overview
- •Register Descriptions
- •USI Data Register – USIDR
- •USI Status Register – USISR
- •USI Control Register – USICR
- •Functional Descriptions
- •Three-wire Mode
- •SPI Slave Operation Example
- •Two-wire Mode
- •Start Condition Detector
- •Alternative USI Usage
- •4-bit Counter
- •12-bit Timer/Counter
- •Software Interrupt
- •Analog Comparator
- •Analog to Digital Converter
- •Features
- •Operation
- •ADC Conversion Result
- •ADLAR = 0
- •ADLAR = 1
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Alternate Port Functions
- •Alternate Functions of Port A
- •Alternate Functions Of Port B
- •Register Description for I/O Ports
- •Port A Data Register – PORTA
- •Port B Data Register – PORTB
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Parallel Programming
- •Enter Programming Mode
- •Chip Erase
- •Programming the Flash
- •Programming the EEPROM
- •Reading the Flash
- •Reading the EEPROM
- •Programming the Lock Bits
- •Reading the Signature Bytes
- •Reading the Calibration Byte
- •Serial Downloading
- •Data Polling Flash
- •Data Polling EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •External Clock Drive Waveforms
- •External Clock Drive
- •ADC Characteristics – Preliminary Data
- •ATtiny26/L Register Summary
- •Ordering Information(1)
- •Packaging Information
- •Data Sheet Change Log for ATtiny26
- •Changes from Rev. 1477A-03/02 to Rev. 1477B-04/02
- •Table of Contents

Features
•High-performance, Low-power AVR ® 8-bit Microcontroller
•RISC Architecture
–118 Powerful Instructions – Most Single Clock Cycle Execution
–32 x 8 General Purpose Working Registers
–Fully Static Operation
–Up to 16 MIPS Throughput at 16 MHz
•Data and Non-volatile Program Memory
–2K Bytes of In-System Programmable Program Memory Flash Endurance: 1,000 Write/Erase Cycles
–128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
–128 Bytes Internal SRAM
–Programming Lock for Flash Program and EEPROM Data Security
•Peripheral Features
–8-bit Timer/Counter with Separate Prescaler
–8-bit High-speed Timer with Separate Prescaler
2 High Frequency PWM Outputs with Separate Output Compare Registers Non-overlapping Inverted PWM Output Pins
–Universal Serial Interface with Start Condition Detector
–10-bit ADC
11 Single Ended Channels
8 Differential ADC Channels
7 Differential ADC Channel Pairs with Programmable Gain (1x, 20x)
–On-chip Analog Comparator
–External Interrupt
–Pin Change Interrupt on 11 Pins
–Programmable Watchdog Timer with Separate On-chip Oscillator
•Special Microcontroller Features
–Low Power Idle, Noise Reduction, and Power-down Modes
–Power-on Reset and Programmable Brown-out Detection
–External and Internal Interrupt Sources
–In-System Programmable via SPI Port
–Internal Calibrated RC Oscillator
•I/O and Packages
–20-lead PDIP/SOIC: 16 Programmable I/O Lines
•Operating Voltages
–2.7V - 5.5V for ATtiny26L
–4.5V - 5.5V for ATtiny26
•Speed Grades
–0 - 8 MHz for ATtiny26L
–0 - 16 MHz for ATtiny26
8-bit Microcontroller with 2K Bytes Flash
ATtiny26
ATtiny26L
Preliminary
Rev. 1477B–AVR–04/02
1