- •Content
- •Introduction 5
- •1. Multiplication in assembly language 6
- •2. Troubleshooting 6
- •Introduction
- •1. Multiplication in assembly language
- •1.1 Basic theoretical information
- •Processor Registers
- •Data Registers
- •Pointer Registers
- •Index Registers
- •Control Registers
- •Segment Registers
- •Data Movement Instructions
- •Arithmetic and Logic Instructions
- •1.2 Rules of block diagram representation
- •1.3 Structure of assembly program log.Exe
- •Conclusion
- •References
Conclusion
Logical instructions typically work on a bit by bit basis, although some processors use the entire contents of the operands as whole flags (zero or not zero input, zero or negative one output). Typical logical operations include logical negation or logical complement (NOT), logical and (AND), logical inclusive or (OR), and logical exclusive or (XOR). Logical tests are a comparison of a value to a bit string (or operand treated as a bit string) of all zeros. Some processors have an instruction that sets or clears a bit or byte in registers or memory based on the processor condition codes.
Therefore, developing 3 algorithms which were described in this work, was very interesting. Moreover, it is possible to see how they work on the examples.
Flowcharts show how is algorithms works. A Flow Chart is a diagrammatic representation that illustrates the sequence of operations to be performed to gain the solution of a problem.
References
https://www.tutorialspoint.com
https://eclass.upatras.gr/modules/document/file.php/EE649/8086%20Registers.htm
Методические указания к выполнению лабораторных работ // Кафедра электроники. – Киев: НАУ – 28 с.
http://creately.com/blog/diagrams/flowchart-guide-flowchart-tutorial/
http://www.c-jump.com/CIS77/ASM/Addressing/lecture.html
http://www.brighthubengineering.com/diy-electronics-devices/51225-architecture-of-8085-microprocessors-part-one/
Питер Абель. Язык Ассемблера для IBM PC и программирования. Избранные главы. Перевод. с англ.- М.:Высшая школа, 1992.-477 с.
Appendix A. Flowchart of AND and OR algorithm
Appendix A. Flowchart of XOR and NOT algorithm
Appendix B. Listing program log1.exe
SSEG SEGMENT PARA STACK 'STACK'
DB 256 DUP(0)
SSEG ENDS
DSEG SEGMENT PARA PUBLIC 'DATA'
rez Dw 1 DUP(0)
DSEG ENDS
CSEG SEGMENT PARA PUBLIC 'CODE'
ASSUME CS:CSEG,DS:DSEG,SS:SSEG
SUMMA PROC FAR
mov ax,DSEG
mov ds,ax
Start: clc
mov ax,5FFFH
and ax,2345h
mov rez,ax
jmp Start
SUMMA ENDP
CSEG ENDS
END SUMMA
Appendix B. Listing program log2.exe
SSEG SEGMENT PARA STACK 'STACK'
Db 256 DUP(0)
SSEG ENDS
DSEG SEGMENT PARA PUBLIC 'DATA'
loga Db 1 DUP(0)
rez Db 1 DUP(0)
DSEG ENDS
CSEG SEGMENT PARA PUBLIC 'CODE'
ASSUME CS:CSEG,DS:DSEG,SS:SSEG
SUMMA PROC FAR
mov ax,DSEG
mov ds,ax
Start: clc
mov ax,29h
or ax,45h
mov bx,OFFSET rez
mov [bx],ax
jmp Start
SUMMA ENDP
CSEG ENDS
END SUMMA
Appendix B. Listing program log3.exe
SSEG SEGMENT PARA STACK 'STACK'
DB 256 DUP(0)
SSEG ENDS
DSEG SEGMENT PARA PUBLIC 'DATA'
rez Dw 1 DUP(0)
DSEG ENDS
CSEG SEGMENT PARA PUBLIC 'CODE'
ASSUME CS:CSEG,DS:DSEG,SS:SSEG
SUMMA PROC FAR
mov ax,DSEG
mov ds,ax
Start: clc
mov ax,5FFFH
xor ax,2345
not ax
mov rez,ax
jmp Start
SUMMA ENDP
CSEG ENDS
END SUMMA
