D a t a S h e e t
16. Test Conditions
Figure 16.1 Test Setup
3.3 V
2.7 kΩ
Device
Under
Test
CL |
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6.2 kΩ |
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Note
Diodes are IN3064 or equivalent.
Table 16.1 |
Test Specifications |
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Speed Option |
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70 |
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90 |
Unit |
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Output Load |
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1 TTL gate |
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Output Load Capacitance, CL |
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30 |
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100 |
pF |
(including jig capacitance) |
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Input Rise and Fall Times |
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5 |
ns |
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Input Pulse Levels |
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0.0 or VCC |
V |
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Input timing measurement reference levels |
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0.5 VCC |
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Output timing measurement reference levels |
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0.5 VCC |
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16.1Key to Switching Waveforms
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Waveform |
Inputs |
Outputs |
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Steady |
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Changing from H to L |
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Changing from L to H |
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Don’t Care, Any Change Permitted |
Changing, State Unknown |
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Does Not Apply |
Center Line is High Impedance State (High Z) |
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Figure 16.2 |
Input Waveforms and Measurement Levels |
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VCC |
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0.5 VCC |
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0.5 VCC |
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Input |
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Measurement Level |
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Output |
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0.0 V |
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48 |
S29AL032D |
S29AL032D_00_A9 January 19, 2007 |