Добавил:
Опубликованный материал нарушает ваши авторские права? Сообщите нам.
Вуз: Предмет: Файл:
ПЛИС / FPGA Sixth Flash / S29AL032D.pdf
Скачиваний:
62
Добавлен:
18.02.2017
Размер:
2.32 Mб
Скачать

S29AL032D

Figure 12.2 Toggle Bit Algorithm

START

Read DQ7–DQ0

Read DQ7–DQ0

(Note 1)

No

Not

 

 

 

 

 

No

 

 

 

 

 

Design

 

 

 

 

 

 

 

 

 

 

 

Toggle Bit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

= Toggle?

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

New

 

 

DQ5

= 1?

 

 

 

 

 

 

 

 

 

Yes

 

 

 

 

 

 

 

 

 

Recommended

for

 

 

 

 

 

Yes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Notes 1, 2)

 

 

 

 

Read DQ7–DQ0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Twice

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Toggle Bit

 

 

No

 

 

 

 

 

 

 

= Toggle?

 

 

 

 

 

 

 

 

 

 

 

Yes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Program/Erase

 

 

 

 

 

 

 

 

 

 

Operation Not

 

 

Program/Erase

 

 

 

Complete, Write

 

 

Operation Complete

 

 

 

Reset Command

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes

1.Read toggle bit twice to determine whether or not it is toggling. See text.

2.Recheck toggle bit because it may stop toggling as DQ5 changes to 1. See text.

12.6DQ5: Exceeded Timing Limits

DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was not successfully completed.

The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device halts the operation, and when the operation has exceeded the timing limits, DQ5 produces a 1.

Document Number: 002-02003 Rev. *B

Page 40 of 64

Соседние файлы в папке FPGA Sixth Flash