- •Reference Manual
- •Cyclone II FPGA Starter Development Board
- •Contents
- •About This Manual
- •1. Introduction
- •Overview
- •Hardware Features
- •Software Features
- •Block Diagram
- •JTAG Programming
- •AS Programming
- •Configuration Procedure
- •Configuring the FPGA in JTAG Mode
- •Configuring the EPCS4 Device in AS Mode
- •Cyclone II EP2C20 FPGA
- •Serial Configuration Device and USB Blaster Circuit
- •SRAM
- •SDRAM
- •Flash Memory
- •SD Card Socket
- •Push Button Switches
- •Toggle Switches
- •Clock Inputs
- •Audio CODEC
- •VGA Output
- •Serial Ports
- •Dual 40-Pin Expansion Headers
- •Component List
- •EPCS4
- •VGA Timing
- •VGA Circuit Pin List
- •VGA Circuit Schematic
- •Audio CODEC
- •Audio Circuit Schematic
- •Audio Circuit Pin List
- •Memory
- •SDRAM Schematic and Pin List
- •SRAM Schematic and Pin List
- •Flash Schematic and Pin List
- •Clock Circuit
- •Clock Circuit Schematic
- •Clock Input Pin List
- •Switches
- •Power ON/OFF Switch
- •RUN/PROG Switch
- •Push Button Switches
- •Push Button Switch Schematic
- •Push Button Switch Pin List
- •Toggle Switches
- •Toggle Switch Schematic
- •Toggle Switch Pin List
- •Displays
- •LEDs
- •LED Schematic
- •LED Pin List
- •Seven-Segment Displays
- •Seven-Segment Display Schematic
- •Seven-Segment Display Pin List
- •Connectors
- •USB-Blaster Port
- •Expansion Headers
- •Expansion Header Schematics
- •Expansion Header Pin List
- •SD Card Connector
- •RS-232 Serial Port
- •RS-232 Circuit Schematic
- •RS-232 Serial Circuit Pin List
- •PS/2 Port
- •PS/2 Circuit Schematic
- •PS/2 Serial Circuit Pin List
- •VGA Video Port
- •Audio Ports
- •SMA External Clock Connector
- •Power Supply Connector
Development Board Components
Additionally, with the switch in the RUN position, the Quartus II Programmer can program the FPGA directly through the USB Blaster circuit. With the switch in the PROG position, the Quartus II Programmer can program the EPCS4 device.
Push Button Switches
The development board provides four push button switches, KEY0-KEY3, located at the bottom right on the development board below the green LEDs, LEDG0-LEDG7 (Figure 2–10). The momentary-contact switches provide stimulus to designs in the FPGA.
Figure 2–10. Push Button Switches and Green LEDs
A switch generates an active-LOW pulse at 0 volts when pressed, returning to a HIGH logic level at 3.3 volts when released. A Schmitt Trigger circuit on each switch debounces the signal (Figure 2–11).
Figure 2–11. Switch Debouncing
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Reference Manual |
Altera Corporation |
Cyclone II FPGA Starter Development Board |
October 2006 |
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