xdx designer
.pdf
9:
: Add Nets Add Net Names. .
20..
( .)
xDX Designer xPCB Layout |
171 |
9:
172 |
xDX Designer xPCB Layout |
9:
3: /
TopLevel ECL_Block. ,?ECL_Block. TopLevel.TopLevel 2 ECL_Block.ECL_Block .
1.TopLevel sheet 1.
2.Page Down sheet 2 .
3.Navigar ECL_Block.
4.2.
5.: Copy.
6. Navigator 2 TopLevel.
xDX Designer xPCB Layout |
173 |
9:
7. : Paste.
.
8.Yes.
9.Navigator 2 ECL_Block.
10.: Delete.
3 sheet 3. - ,sheet 3.
. .
11.Menu: Tools > Update Other Objects.
174 |
xDX Designer xPCB Layout |
9:
4: AMP
AMP.
1.TopLevel sheet 1.
2.D_2_A.
D_2_A 16 14
54ALS549 MEM_BUS .
AMP, ., . . !
3.( -, -, - , . .), .
4.amp “AMP_TOP”, “AMP_BOTTOM”.
xDX Designer xPCB Layout |
175 |
9:
5.ICDB Project Backup .
„After Lab9, block contents finished...”
, Student_Project.
: PDF Student_Project.
176 |
xDX Designer xPCB Layout |
10
xDX Databook Hierarchical Verification,
Menu: Tools > Verify
Student_Project.
, :
C:\MGTraining\Solutions\Student_Project_after_lab9.zip
C:\MGTraining\projects.
.
1: xDX Databook Live Verification |
178 |
2: Hierarchical Verification |
180 |
3: DRC |
182 |
4: xDX Designer |
185 |
5: |
186 |
6: |
189 |
xDX Designer xPCB Layout |
177 |
10:
1: xDX Databook Live Verification
.,. , ..
1.Student_Project.
2.ECL_Block, sheet 1.
3.xDX Databook
4.New Live Verification Window. 
( xDX Databook .)
.
:
, .Search.
. .
178 |
xDX Designer xPCB Layout |
10:
- ..
.
5. Update all unique matches with missing properties.
.
6.Verify.
ECL_Block xDX Databook.
xDX Designer xPCB Layout |
179 |
10:
2: Hierarchical Verification
xDX Databook .Hierarchical Verification Live Verification.
1.sheet 1 TopLevel.
2.xDX Databook.
3.New Hierarchical Verification Window.
4.Verify All Components in the Current Design. 
5..
180 |
xDX Designer xPCB Layout |