Pipelined execution |
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5 Pipelined execution
The STM8 family uses a 3-stage pipeline to increase the speed of the flow of instructions sent to the processor. Pipelined execution allows several operations to be performed simultaneously, rather than serially:
●Fetch
●Decode and address
●Execute
The Program Counter (PC) points always to the instruction in decode stage as shown in
Figure 5.
Figure 5. Pipelined execution principle
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)NSTRUCTIONS S FETCHED FROMDMEMORY
)NSTRUCTIONSIDECODING AND DATADREAD FROMAMEMORYY IF NEEDED
2EGISTER S TDATA READ FROM REGISTERRBANK 3HIFTIANDT!,5AOPERATION 7RITETBACKKREGISTER S SDATA TO 2EGISTER BANK
7RITETBACKKDATA TOTMEMORY
-3 6
5.1Description of pipelined execution stages
Figure 6 and Section 5.1.1, Section 5.1.2, and Section 5.1.3 provide a detailed description of each stage of the pipeline execution.
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