JRxx

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PM0044	STM8 instruction set

JRxx		Conditional Jump
		Relative Instruction
Syntax	JRxx dst	e.g. JRxx loop
Operation	PC = PC+lgth
	PC <= PC + dst, if Condition is True

JRxx

Description Conditional relative jump. PC is updated by the signed addition of PC and dst, if the condition is true. Control, then passes to the statement addressed by the program counter. Else, the program continues normally.

Instruction overview

mnem

dst

Affected condition flags

JRxx

Mem

Instruction List

mnem

meaning

sym

Condition

Op-code (OC)

JRC

Carry

C = 1

JREQ

Equal

Z = 1

JRF

False

JRH

Half-Carry

H = 1

JRIH

Interrupt Line is High

JRIL

Interrupt Line is Low

JRM

Interrupt Mask

I = 1

JRMI

Minus

< 0

N = 1

JRNC

Not Carry

C = 0

JRNE

Not Equal

<> 0

Z = 0

JRNH

Not Half-Carry

H = 0

JRNM

Not Interrupt Mask

I = 0

JRNV

Not Overflow

V = 0

JRPL

Plus

>= 0

N = 0

JRSGE

Signed Greater or Equal

(N XOR V) = 0

JRSGT

Signed Greater Than

(Z OR (N XOR V)) = 0

JRSLE

Signed Lower or Equal

(Z OR (N XOR V)) = 1

JRSLT

Signed Lower Than

(N XOR V) = 1

JRT

True

JRUGE

Unsigned Greater or Equal

C = 0

JRUGT

Unsigned Greater Than

C = 0 and Z = 0

JRULE

Unsigned Lower or Equal

C = 1 or Z = 1

JRC

Carry

C = 1

JRULT

Unsigned Lower Than

C = 1

JRV

Overflow

V = 1

Detailed description

dst

Asm

lgth

Op-code(s)

ST7

shortoff

JRxx $15

1/2

Op-code

shortoff

JRxx $15

1/2

Op-code

Doc ID 13590 Rev 3

113/162

STM8 instruction set	PM0044

LD		Load	LD
Syntax	LD dst,src	e.g. LD A,#$15
Operation	dst <= src
Description	Load the destination byte with the source byte. The dst and src can be a
	register, a byte (low/high) of an index register or a memory/data byte. When
	half of an index register is loaded, the other half remains unchanged.

Instruction overview

mnem

dst

src

Affected condition flags

Reg

Mem

Reg

Set if bit 7 of the result is set (negative value), cleared otherwise.

R7.R6.R5.R4.R3.R2.R1.R0

Set if the result is zero (0x00), cleared otherwise.

Detailed description

dst

src

Asm

lgth

Op-code(s)

ST7

#byte

LD A,#$55

shortmem

LD A,$50

longmem

LD A,$5000

(X)

LD A,(X)

(shortoff,X)

LD A,($50,X)

(longoff,X)

LD A,($5000,X)

(Y)

LD A,(Y)

(shortoff,Y)

LD A,($50,Y)

(longoff,Y)

LD A,($5000,Y)

(shortoff,SP)

LD A,($50,SP)

[shortptr.w]

LD A,[$50.w]

[longptr.w]

LD A,[$5000.w]

([shortptr.w],X)

LD A,([$50.w],X)

([longptr.w],X)

LD A,([$5000.w],X)

([shortptr.w],Y)

LD A,([$50.w],Y)

114/162

Doc ID 13590 Rev 3

PM0044

STM8 instruction set

LD detailed description (Continued)

dst

src

Asm

lgth

Op-code(s)

ST7

shortmem

LD $50,A

longmem

LD $5000,A

(X)

LD (X),A

(shortoff,X)

LD ($50,X),A

(longoff,X)

LD ($5000,X),A

(Y)

LD (Y),A

(shortoff,Y)

LD ($50,Y),A

(longoff,Y)

LD ($5000,Y),A

(shortoff,SP)

LD ($50,SP),A

[shortptr.w]

LD [$50.w],A

[longptr.w]

LD [$5000.w],A

([shortptr.w],

LD ([$50.w],X),A

([longptr.w],X)

([$5000.w],X),A

([shortptr.w],

LD ([$50.w],Y),A

dst

src

Asm

lgth

Op-code(s)

ST7

LD XL,A

LD A,XL

LD YL,A

LD A,YL

LD XH,A

LD A,XH

LD YH,A

LD A,YH

LDW		Load word
Syntax	LDW dst,src	e.g. LDW X,#$1500
Operation	dst <= src

MOV		Move	MOV
Syntax	MOV dst,src	e.g.	MOV $80,#$AA
Operation	dst<= src
Description	Moves a byte of data from a source address to a destination address. Data
	is examined as it is moved. The accumulator is not affected.
	There are 3 addressing modes for the MOV instruction:

MUL	Multiply (unsigned)		MUL
Syntax	MUL dst,src	e.g. MUL X,A
Operation	dst:src <= dst x src
Description	Multiplies the 8-bit value in index register, low byte, (XL or YL) by the 8-bit
	value in the accumulator to obtain a 16-bit unsigned result in the index
	register. After the operation, index register contains the 16-bit result. The
	accumulator remains unchanged. The initial value of the high byte of the
	index register (XH or YH) is ignored.

STM8 instruction set										PM0044

	NEG detailed description (continued)
	dst	Asm	cy	lgth			Op-code(s)				ST7

	[longptr.w]	NEG($F5C2.w)	4	4	72	30		MS	LS

	([shortptr.w],X)	NEG([$F5],X)	4	3	92	60		XX

	([longptr.w],X)	NEG([$F5C2.w],X)	4	4	72	60		MS	LS

	([shortptr.w],Y)	NEG([$F5],Y)	4	3	91	60		XX

mnem	dst	src			Affected condition flags

			V	I1		H	I0	N	Z	C
			V	I1		H	I0	N	Z	C

MUL	X	XL,A	-	-		0	-	-	-	0

MUL	Y	YL,A	-	-		0	-	-	-	0