dsd13-gos / dsd-14=pdk / Lect13_14

Introducing Diva Verification

• The Diva® verification product is a set of physical verification tools that lets you find and correct design errors. Using layer processing to prepare data, this set of verification tools checks physical design and electrical functionality and performs layout versus schematic comparisons.

Diva Verification Tool Set

The Diva verification tool set has five interactive products:

•Design Rule Checker (iDRC)

•Layout Parasitic Extractor (iLPE)

•Parasitic Resistance Extractor (iPRE)

•Electrical Rules Checker (iERC)

•Layout Versus Schematic program (iLVS)

iDRC

•The Design Rule Checker, iDRC, helps you find deviations from VLSI/ULSI design constraints. The DRC program works with any technology and handles all layout methodologies, including full custom, structured custom, standard cell, macro cell, gate array, and automated layout.

•DRC’s interactive tools give such broad design rule coverage that it almost eliminates false errors. You can use DRC to check material spacing, enclosure, and overlap. Its full hierarchical operation, incremental checking, and unique pattern-recognition capabilities reduce run times.

iERC

•The Electrical Rules Checker, iERC, checks network connectivity. The ERC program highlights electrical problems, such as floating interconnect and devices, and abnormal connections in physical or schematic designs. The ERC program uses networks generated from either the layout or schematic.

•ERC performs conventional checks, such as verifying pull up/pull down and isolating inactive devices. It can also convert a MOS transistor-level network into a gate-level network with gatelevel parameters. This lets the network be processed by gatelevel simulators.

iLVS

•The comparison product Layout Versus Schematic, iLVS, checks for matching nets, devices, and parameters in circuit networks. The LVS program compares a layout and schematic, two layouts, or two schematics. The LVS program has advanced capabilities, including full device permutability. To aid in error correction, you can view the results interactively using error probing and correspondence cross-probing.

Diva Tool Flow

The DRC Flow