A.2. FLOATING POINT INSTRUCTIONS |
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A.2 Floating Point Instructions
In this section, many of the 80x86 math coprocessor instructions are described. The description section briefly describes the operation of the instruction. To save space, information about whether the instruction pops the stack is not given in the description.
The format column shows what type of operands can be used with each instruction. The following abbreviations are used:
STn |
A coprocessor register |
F |
Single precision number in memory |
D |
Double precision number in memory |
E |
Extended precision number in memory |
I16 |
Integer word in memory |
I32 |
Integer double word in memory |
I64 |
Integer quad word in memory |
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Instructions requiring a Pentium Pro or better are marked with an asterisk( ).
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Instruction |
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Description |
Format |
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FABS |
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ST0 = |ST0| |
STn F D |
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FADD src |
ST0 += src |
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FADD dest, ST0 |
dest |
+= STO |
STn |
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FADDP dest [,ST0] |
dest |
+= ST0 |
STn |
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FCHS |
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ST0 = −ST0 |
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FCOM src |
Compare ST0 and src |
STn F D |
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FCOMP src |
Compare ST0 and src |
STn F D |
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FCOMPP src |
Compares ST0 and ST1 |
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FCOMI |
src |
Compares into FLAGS |
STn |
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FCOMIP |
src |
Compares into FLAGS |
STn |
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FDIV src |
ST0 /= src |
STn F D |
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FDIV dest, ST0 |
dest |
/= STO |
STn |
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FDIVP dest [,ST0] |
dest |
/= ST0 |
STn |
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FDIVR src |
ST0 = src /ST0 |
STn F D |
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FDIVR dest, ST0 |
dest |
= ST0/dest |
STn |
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FDIVRP dest [,ST0] |
dest |
= ST0/dest |
STn |
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FFREE dest |
Marks as empty |
STn |
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FIADD src |
ST0 += src |
I16 I32 |
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FICOM src |
Compare ST0 and src |
I16 I32 |
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FICOMP src |
Compare ST0 and src |
I16 I32 |
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FIDIV src |
STO /= src |
I16 I32 |
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FIDIVR src |
STO = src /ST0 |
I16 I32 |
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180 |
APPENDIX A. 80X86 INSTRUCTIONS |
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Instruction |
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Description |
Format |
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FILD src |
Push src on Stack |
I16 |
I32 I64 |
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FIMUL src |
ST0 *= src |
I16 |
I32 |
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FINIT |
Initialize Coprocessor |
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FIST dest |
Store ST0 |
I16 |
I32 |
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FISTP dest |
Store ST0 |
I16 |
I32 I64 |
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FISUB src |
ST0 -= src |
I16 |
I32 |
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FISUBR src |
ST0 = src - ST0 |
I16 |
I32 |
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FLD src |
Push src on Stack |
STn F D E |
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FLD1 |
Push 1.0 on Stack |
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FLDCW src |
Load Control Word Register |
I16 |
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FLDPI |
Push π on Stack |
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FLDZ |
Push 0.0 on Stack |
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FMUL src |
ST0 *= src |
STn F D |
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FMUL dest, ST0 |
dest |
*= STO |
STn |
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FMULP dest [,ST0] |
dest |
*= ST0 |
STn |
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FRNDINT |
Round ST0 |
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FSCALE |
ST0 = ST0 × 2bST1c |
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FSQRT |
ST0 = |
√ |
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STO |
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FST dest |
Store ST0 |
STn F D |
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FSTP dest |
Store ST0 |
STn F D E |
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FSTCW dest |
Store Control Word Register |
I16 |
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FSTSW dest |
Store Status Word Register |
I16 |
AX |
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FSUB src |
ST0 -= src |
STn F D |
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FSUB dest, ST0 |
dest |
-= STO |
STn |
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FSUBP dest [,ST0] |
dest |
-= ST0 |
STn |
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FSUBR src |
ST0 = src -ST0 |
STn F D |
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FSUBR dest, ST0 |
dest = ST0-dest |
STn |
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FSUBP dest [,ST0] |
dest = ST0-dest |
STn |
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FTST |
Compare ST0 with 0.0 |
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FXCH dest |
Exchange ST0 and dest |
STn |
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