This chapter describes the ARM7TDMI memory interface.

Overview

ARM7TDMI’s memory interface consists of the following basic elements:

•32-bit address bus

This specifies to memory the location to be used for the transfer.

•32-bit data bus

Instructions and data are transferred across this bus. Data may be word, halfword or byte wide in size.

ARM7TDMI includes a bidirectional data bus, D[31:0], plus separate unidirectional data busses, DIN[31:0] and DOUT[31:0]. Most of the text in this chapter describes the bus behaviour assuming that the bidirectional is in use. However, the behaviour applies equally to the unidirectional busses.

•Control signals

These specify, for example, the size of the data to be transferred, and the direction of the transfer together with providing privileged information.

This collection of signals allow ARM7TDMI to be simply interfaced to DRAM, SRAM and ROM. To fully exploit page mode access to DRAM, information is provided on whether or not the memory accesses are sequential. In general, interfacing to static memories is much simpler than interfacing to dynamic memory.