Multiply Long and Multiply-Accumulate Long (MULL,MLAL)

The instruction is only executed if the condition is true. The various conditions are defined in Table 6. The instruction encoding is shown in Figure 22.

The multiply long instructions perform integer multiplication on two 32 bit operands and produce 64 bit results. Signed and unsigned multiplication each with optional accumulate give rise to four variations.

The multiply forms (UMULL and SMULL) take two 32 bit numbers and multiply them to produce a 64 bit result of the form RdHi,RdLo := Rm * Rs. The lower 32 bits of the 64 bit result are written to RdLo, the upper 32 bits of the result are written to RdHi.

The multiply-accumulate forms (UMLAL and SMLAL) take two 32 bit numbers, multiply them and add a 64 bit number to produce a 64 bit result of the form RdHi,RdLo := Rm * Rs + RdHi,RdLo. The lower 32 bits of the 64 bit number to add is read from RdLo. The upper 32 bits of the 64 bit number to add is read from RdHi. The lower 32 bits of the 64 bit result are written to RdLo. The upper 32 bits of the 64 bit result are written to RdHi.

The UMULL and UMLAL instructions treat all of their operands as unsigned binary numbers and write an unsigned 64 bit result. The SMULL and SMLAL instructions treat all of their operands as two’s-complement signed numbers and write a two’s-complement signed 64 bit result.

Operand restrictions

•R15 must not be used as an operand or as a destination register.

•RdHi, RdLo, and Rm must all specify different registers.

Operand registers

Source destination registers

Set condition code

0 = do not alter condition codes

1 = set condition codes

Accumulate

0 = multiply only

1 = multiply and accumulate

Unsigned

0 = unsigned

1 = signed

Condition Field

Instruction cycle times

MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the number of 8 bit multiplier array cycles required to complete the multiply, which is controlled by the value of the multiplier operand specified by Rs.

Its possible values are as follows:

For signed instructions SMULL, SMLAL:

1if bits [31:8] of the multiplier operand are all zero or all one.

2if bits [31:16] of the multiplier operand are all zero or all one.

3if bits [31:24] of the multiplier operand are all zero or all one.

4in all other cases.

For unsigned instructions UMULL, UMLAL:

1if bits [31:8] of the multiplier operand are all zero.

2if bits [31:16] of the multiplier operand are all zero.

3if bits [31:24] of the multiplier operand are all zero.

4in all other cases.

S and I are as defined in Cycle Types.