Introduction

1.2Block diagram

Figure 1-1 shows the block diagram of the PrimeCell GIR. For further details see also

PrimeCell GIR functional description on page 2-3.

Figure 1-1 PrimeCell GIR block diagram

Introduction

1.3AMBA compatibility

The PrimeCell GIR complies with the AMBA Specification (Rev 2.0) onwards. The fundamental differences from the AMBA Specification Revision D are:

•the timing of the strobe signal PSTB compared with the enable signal

PENABLE

•the time at which read data is sampled

•a separate unidirectional read data bus PRDATA, and unidirectional write data bus PWDATA (instead of the bidirectional data bus PD)

•the address bus is named PADDR (instead of PA).

This document assumes little-endian memory organization, where bytes of increasing significance are stored in increasing addresses in memory, and hence low-order bytes are transferred on the low-order bits of the data bus. The PrimeCell GIR can also be used in a system with a big-endian memory organization, and several methods of achieving this are described in the ARM PrimeCell Generic Infrared Interface (PL140) Integration Manual.