Chapter 1

About This Book

The MIPS32™ Architecture For Programmers Volume II comes as a multi-volume set.

•Volume I describes conventions used throughout the document set, and provides an introduction to the MIPS32™ Architecture

•Volume II provides detailed descriptions of each instruction in the MIPS32™ instruction set

•Volume III describes the MIPS32™ Privileged Resource Architecture which defines and governs the behavior of the privileged resources included in a MIPS32™ processor implementation

•Volume IV-a describes the MIPS16e™ Application-Specific Extension to the MIPS32™ Architecture

•Volume IV-b describes the MDMX™ Application-Specific Extension to the MIPS32™ Architecture and is not applicable to the MIPS32™ document set

•Volume IV-c describes the MIPS-3D™ Application-Specific Extension to the MIPS64™ Architecture and is not applicable to the MIPS32™ document set

•Volume IV-d describes the SmartMIPS™Application-Specific Extension to the MIPS32™ Architecture

1.1Typographical Conventions

This section describes the use of italic, bold and courier fonts in this book.

1.1.1 Italic Text

•is used for emphasis

•is used for bits, fields , registers, that are important from a software perspective (for instance, address bits used by software, and programmable fields and registers), and various floating point instruction formats , such as S, D, and PS

•is used for the memory access types, such as cached and uncached

1.1.2 Bold Text

•represents a term that is being defined

•is used for bits and fields that are important from a hardware perspective (for instance, register bits, which are not programmable but accessible only to hardware)

•is used for ranges of numbers; the range is indicated by an ellipsis. For instance, 5..1 indicates numbers 5 through 1

•is used to emphasize UNPREDICTABLE and UNDEFINED behavior, as defined below.

1.1.3 Courier Text

Courier fixed-width font is used for text that is displayed on the screen, and for examples of code and instruction pseudocode.

Copyright © 2001-2003 MIPS Technologies Inc. All rights reserved.