“Digital Systems Testing and Design for Testability”

6.Memory Testing

6.1.RAM Faults Model

Types of Memory:

DRAM- Dynamic Random Access Memories

Highest number of bits/chip, but need for refresh for information (stored in capacitor); volatile

SRAM- Static Random Access Memories

Store in latches; no refresh need, but more silicon/bit than DRAM; volatile

ROM- Read Only Memory

Permanent – information burned in at manufacture; non-volatile

EPROM – Erasable, Programmable Read – Only Memories

Non-volatile, programmable by end-user (erasure of whole chip by exposure to ultraviolet light)

EEPROM – Electronically Erasable, Programmable Read – Only Memories

Non-volatile; information can be erased on a word by word basis by3 writing to the chip, rather than erasure of whole chip

6.Memory Testing

6.1.RAM Faults Model

Fault analysis

Global defects may be caused by a too thick gate oxide, or too thin poly silicon, mask misalignments, and so forth. They affect many chips on a wafer and and can be detected at first testing stages.

Local defects (also called spot defects) are caused by extra, missing, or inappropriate material (for example, dust particles). A spot defect affect only a single chip and causes a functional fault.

Functional faults: 1. Cell stuck.

2. Driver stuck

3. Read/write line stuck

4. Chip select line stuck

5. Data line stuck

6. Short between data lines

7. Crosstalk between data lines

8. Address line stuck

9. Open in address line

10. Shorts between address lines

11. Open decoder

12. Wrong access

13. Multiple access

14. Cell can be set to = but not to 1 (or vice-versa) 4

15. Pattern sensitive interaction between cells

6.Memory Testing

6.1.RAM Testing

Testing Problem:

-Exponential increase of number of bits/chip;

-Increasing density leads to greater susceptibility to problems from neighboring cells, noise on address lines, transient faults etc;

-Complexity of test algorithm becomes critical as number of memory cells increases.

Exhaustive memory test:

Memory of n cells – have to check for every cell – it can store 1 and 0 and be read, for every combination of the contents of the rest of the memory. Requires at least for each of the 2n states for the memory go through each cell, and read, write opposite value, i.e. number of operations >3n 2n.

Given a 1K memory (1024 cells) cycle time = 100nsecs time requred for complete memory fault check exceeds 18 10296 years

TOO LARGE to be practical for any memory e.g. even for just 32 bit RAM –

6.Memory Testing

6.1.RAM Faults Model

Fault 1: With a certain address, no cell will be accessed; Fault 2: A certain cell will not be accessible;

Fault 3: With a certain address, multiple cells are accessed simultaneously;

6.Memory Testing

6.1.RAM Faults Model

Simple Memory Faults

Single faults:

Stuck-at (SAF). A permanent stuck-at 0 or stuck-at 1 fault that may occur in any memory cell.

To detect SAF the value 0 and value have to be read from all memory

cells.

Stuck-open faults (SOF). An SOF in a memory cell means that the cell cannot be accessed.

To detect SOF a memory test has to verify that 0 and 1 can be read from every cell.

Transition fault (TF). A cell fails to undergo 0 1 transition and/or 1 0 transition.

verified. Both transitions for all memory cells have to be performed and final value

Data retention fault (DRF). A cell fails to retain its logic value after some period of time.

6.Memory Testing

Pattern Sensitive Faults 6.1.RAM Faults Model

A Pattern Sensitive Fault (PSF) is defined as follows: The contents of a cell, or ability to change the contents, is influenced by the contents of all other cells in the memory. These contents consists of a pattern of 0s and 1s, or changes in these contents. The base cell b is the cell under test. The neighborhood cells are the cells that are the neighbors to the base cell.

Active Pattern Sensitive Fault (APSF), also called a Dynamic PSF: the base cell changes its contents due to a changes in the neighborhood pattern. This changes consists of a transition on one neighborhood cell, while the remaining neighborhood cells and the base cell contain a certain pattern.

Passive Pattern Sensitive Fault (PPSF): the content of the base cell cannot be changed due to a certain neighborhood pattern.

Static Pattern Sensitive Fault (SPSF): the content of a base cell is forced to a