Signal/Connection Descriptions

Interrupt and Mode Control

Table 1-5 Interrupt and Mode Control (Continued)

Signal Name

Type

State During

Signal Description

Reset

Input

Input

Mode Select C/Non-maskable Interrupt Request— This

MODC/NMI

input has two functions:

1. to select the initial chip operating mode, and

2. after internal synchronization, to allow an

external device to request a non-maskable DSP

interrupt.

MODC is read and internally latched in the DSP when the

processor exits the Reset state. MODA, MODB, and

MODC select the initial chip operating mode. Several

clock cycles (depending on PLL stabilization time) after

leaving the Reset state, the MODC signal changes to the

nonmaskable external interrupt request

NMI.

After reset,

the chip operating mode can be changed by software. The

NMI

input is an external interrupt request that indicates

that an external device is requesting service. It may be

programmed to be level-sensitive or negative-edge-

sensitive.

Input

Input

Reset — This input is a direct hardware reset on the

RESET

processor. When

RESET

is asserted low, the DSP is

initialized and placed in the Reset state. A Schmitt trigger

input is used for noise immunity. When the

RESET

signal

is deasserted, the initial chip operating mode is latched

from the MODA, MODB, and MODC signals. The

internal reset signal is deasserted synchronous with the

internal clocks. In addition, the PINIT pin is sampled and

written into the PEN bit of the PLL Control Register.

MOTOROLA

DSP56011/D

1-7